Application Bulletin: Automatic Gain Control (Agc) Using The Diamond Transistor Opa660
Application Bulletin: Automatic Gain Control (Agc) Using The Diamond Transistor Opa660
Application Bulletin: Automatic Gain Control (Agc) Using The Diamond Transistor Opa660
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quiescent current programmer, it can also be used for multiplicative applications. Figure 1 illustrates the dependance of the transconductance (gm = d(IOUT)/d(VIN)) upon the resistance, RQC. The following equation can be derived from the idealized OPA660 model circuits shown in Figure 2. V IQC = T ln (n) RQC When the temperature voltage (VT) is 25.86mV, the quiescent current resistance (RQC) is 250, and the scale factor (n) of the transistor R122 is 10, the cross current IQC can be calculated as follows: IQC = 25.86mV ln(10) = 238A 250
The quiescent current of the subsequent transistor stages can be calculated with a scale factor (a) of 7.3 for transistors 31, 32, 81, and 82 to IQC' = a IQC = 7.3 238A = 1.74mA
IOUT (mA) 1.5 RQC 250 1.0 500 0.5
20
15
10 0.5
10
15
20 VIN (mV)
1.0
1.5
VOUT = VIN
M RQC VOUT
VIN
RQC
SBOA072
BC
7 (13)
7 (13) IQC'
DB
DT
7 (13)
IQC' 31 7.3(x)
IQC'
IQC
3 7.3(x)
FIGURE 2. Idealized Model Circuit. Now it is easy to determine the transconductance using the following equation: gm = IQC VT = a ln(n) = 67mA/V RQC gm, since it is dependent upon the modulation. This change results in turn in signal distortion. The following equations derive the relation between the signal amplitude and distortion. i = I1 I2 = IQC' Exp +
The circuit diagram of the actual multiplier circuit as illustrated in Figure 3 makes it easier to determine the multiplication constant, M. The signal current at Pin 8 produces the following output voltage at the resistor ROUT: VOUT = i ROUT = VIN gm ROUT = VIN M RQC
( )
V VT
Exp
( )
V VT
i = IQC' [Exp () Exp (+)] = 2IQC' sinh () = VIN Rgm i VIN + 2IQC' Rgm sinh () V = = 2VT 2VT VT VIN = 2VT 2IQC' Rgm sinh () d(i) = 2IQC' cosh () d()
When the resistor (ROUT) has 2.08k and the input voltage is 10mV, the output voltage reaches the following value: VOUT = a ln(n) ROUT RQC 7.3 ln(10) 2.08k 250 = 1.4V
= 10mV
d(VIN) d()
The multiplication constant M can be derived directly from the equation as follows: M = a ln(n) ROUT = 7.3 ln(10) 2.08k = 35k The gain G can be calculated using the equation: G= d(VOUT) d(VIN) = M 35k = = 140 RQC 250
cosh () = sinh2 () + 1 =
( )
i/IQC' 2 1 Rgm
+1
gm =
d(i) d(VIN)
d(i)/d() d(VIN)/d()
VT IQC' cosh ()
DETERMINING THE DIFFERENTIAL GAIN (DG) Figure 4 shows the circuit part important for the multiplication. When VIN = 0, i = 0, and I1 = I2 = IQC, i increases with rising VIN, resulting in variation of the currents I1 and I2. The increase in both currents also changes the transconductance 2
= Rgm + IQC'
1 VT
( )
i/IQC' 2
+1
IQC' =
The following applies for low modulation: iMAX VINMAX Rgm + VT/IQC'
gm0 =
i=0
In the extreme case in which Rgm = 0, the following results: or for low modulation: Rgm + VT/IQC' Rgm +
2
DG =
gmMAX gm0
1= Rgm +
DG
VT/IQC' VIN/IQC'
2
iMAX/IQC' 2
+1
2 (Rgm +VT/IQC')
+1
+1
VIN 10mVp0
DB OPA660 DT
DG0 =
( (
iMAX/IQC' 2
)
2
+1 1
Rgm 1m
DG0
RQC 250
VINMAX 2VT
+1 1
5V
Figures 5 through 8 show an analysis of the equation DG = f (VIN; Rgm; RQC), which determines the differential gain error dependent upon the input voltage. The figures include the open-loop gain resistance (Rgm) and quiescent current resistance (RQC). As is evident, Rgm produces transfer linearization, but it also reduces the gain, GRgm.
IQC'
IQC'
GRgm =
VIN
I1 I2
Rgm
I2 I1
= Rgm +
RQC a ln(n)
i=0
IQC'
IQC'
As will be shown later, the gain reduction results in a poorer signal-to-noise ratio (S/N). Designers can determine the best performance compromise for DG and S/N by choosing appropriate values for VINMAX and Rgm. However, the larger the control range that is, the greater the variation of RQC the poorer the quality of the compromise that can be attained.
10
DG max
DG max
0 RQC = 250
10 RQC = 500 3
3 10
10 20
Rgm ()
30 40
0.3
50
10
DG max
RQC = 1k 3
DG max
0 10 20 30 40 50
10 RQC = 2k 3
0 10 20 30 40 50
Rgm ()
0.3
0.3
FIGURE 7. Differential Gain Error (RQC = 1k). When Rgm is inserted, the relation between the gain, GRgm, and the control value, 1/RQC, becomes disproportionate. AUTOMATIC GAIN CONTROL (AGC) Circuit tolerances and insufficient temperature compensation result in undefined gains (GRgm = f(RQC)) of about 25%. If RQC is implemented by a FET, this undefined gain range increases even more. These problems can be avoided by using an AGC circuit as shown in Figure 9. In the detailed circuit in Figure 10, the 0.7V input signal (VIN), which is assumed for now as a constant, is divided by the input divider (4k/56) to about 10mV. The 4k resistor in front of the circuit can, of course, be removed if the input amplitude is only in the mV range, as is the case in fiber optic transmission receivers. The amplifier (OPA621) placed after the circuit converts the output current i of the multiplier (OPA660) into voltage. The peak detector and comparator compare the 1.4V output signal (VOUT) with the given reference value +1.4V and connect the control voltage to the FET. This control ensures that the peak value of VOUT is identical to the adjustable reference DC voltage and is 4
Level Control
FIGURE 9. AGC Circuit (Schematic). unaffected by circuit tolerances. It is also possible to control the output voltage against the black level or synchronization level by acquiring the output voltage for comparison only during the horizontal sync time. While the luminance signal changes over time, the sync level is always transmitted with constant amplitude. Such regulation enables the video signal to be transmitted at a constant amplitude despite changes in the luminance signal.
Rgm ()
(%)
(%)
Rgm ()
(%)
(%)
VOUT 1.4Vp-p
10k Offset 5V
5 56
DB
DT
VIN 0.7Vp-p
4 5V
Rgm 1m
56
RQC 250
FIGURE 11. Peak Level. Variations in the input signal amplitude cause the control system to produce constant output signal amplitudes corresponding to the reference value. Simultaneous changes in VIN and the reference value are also possible. DETERMINING THE MAXIMUM DIFFERENTIAL GAIN (DGMAX) OF AGC AMPLIFIERS The input voltage of AGC amplifiers varies from VINMIN to VINMAX. To maintain a constant output voltage (VOUT) over this range, the control voltage from the peak level control varies the resistance RQC correspondingly from RQCMIN to R QCMAX. The largest signal distortions measured as 5
+5V VOUT 3 2 4 10k 5V Hk 4Vp-p 5V 47k 0.1F 2N3904 1N4148 7 CA3080 5 C hold 1F 6 To Multiplier Pin 1
differential gain (DGMAX) happen at VINMAX or RQCMAX, thus during operation of the OPA660 with the smallest quiescent current IQ. For the control range q of the AGC amplifier, the following conditions apply: q= VINMAX VINMIN
It should be kept in mind, however, that this equation is based upon the simplified model shown in Figure 2 and sometimes deviates from measurements and simulation results. The measurements, for example, also include distortion from the subsequent amplifier OPA621. Figures 13 to 15 give an overview of the achievable distortion. For maximum input voltages (VINMAX) from 10mV to 20mV and open-loop resistances from 0 to 50, the differential gain shown in simulations is a function of the ratio VINMAX/VINMIN and equals 9. Figure 16 presents measured achievable distortions in the AGC structure, as already shown in Figure 10. THERMALLY INDUCED DISTORTION As shown in Figure 2, the power consumption of transistors 31, 32, 81, and 82 varies according to the signal curve. This variation leads to temperature oscillation and finally to change in the transconductance gm. At first glance, it looks as if the pulse distortion is caused by RC parts. The visible thermal time constant, however, is in the microsecond range and is negatively affected by unequal temperature distribution on the chip.
From these equations, it is possible to derive the maximum distortion, DGMAX, as a function of B and the maximum input voltage.
+1
As Figure 17 shows, Rgm can reduce this thermally induced pulse distortion.
1.0
1.0
0.3
10 DGMAX 3.0
Rgm ()
VINMAX = 20mVp0 0 10 20 30 40 50
1.0
1.0
Rgm ()
(%)
(%)
Rgm ()
(%)
(%)
In contrast, periodic RF signals less than 1MHz are barely affected by the pulse distortion. The temperature change can no longer follow the signal change, resulting in more balanced temperature distribution on the chip. DEMO BOARD All available measurements were conducted using the completely dimensioned circuit shown in Figure 19. The demo board designed for this application contains four circuit blocks. As a differential amplifier with current output, the OPA660 allows users to control the transconductance by varying the total quiescent current. Functioning mainly as a multiplier, it also enables a shift in DC position of the output voltage by varying the noninverting OPA660 input. The OPA621 functions as a current-to-voltage converter and amplifies the signal. The switch, S1, in the shift block lets the user choose between manual, and automatic offset compensation, and clamped DC restoration. At active LOW, the clamp pulse triggers the OTA module CA3080, checks the output voltage (VOUT) against the reference value for the black level voltage, and stores the correction voltage up to the next clamp pulse (HK) in the capacitor CHOLD. The fourth block is the already mentioned peak level control circuit. The discrete differential amplifier checks the peak value of the output voltage (VOUT) against the reference voltage set by PREF. The transistor 2N5460 changes the quiescent current according to the difference, thus varying the transconductance gm. For applications requiring frequencies of more than 80MHz and a controlled output voltage (VOUT) of more than 1V, we recommend two-stage gain using two OPA621s. With the amplifiers OPA622 and OPA623, it will be possible to increase the bandwidth even more.
2 VINMAX/VINMIN 1 1 2 3 4 5 6 7 8
64 60 56 VINMAX = 20mVp0
S/N (dB)
52 48 44
VINMAX/VINMIN 1 2 3 4 5 6 7 8
0 10 20 30 40 50
40
Rgm ()
Rgm ()
(%)
+5V Amplfier R6 100 10nF 3 2 7 OPA621 4 2.2F 10nF 5V 9 R7 VOUT 20k 2.2F VOUT 2.8Vp-p
R9 51
+5V
2.2F i 10nF 1 S1 2 3
Manual
13mV Automatic
4 Clamped R3 56
+5V
7 CA3080 3 2 1 CHOLD C4 R 20 1F 10 6 5
R11 1k R22 1k
R2 51 Rgm
2.2F
10nF 5V 0.1F
2.2F
R21 47k
HK
Multiplier
5V
4Vp-p
+5V +5V 220F R16 2.7k +1.6V PREF VREF 1k +0.4V R17 330 D1 2811 R14 2.2M C2 + 0.47F R15 100 2N5460 2* BC577 R12 2.2M 220F R18 100k R13 100 C 3 + 0.47F Peak Level-Control R10
D2 2811
RQC
C1 4.7F
R19 1M
5V
PARTS LIST
NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 C2 , C3 C5 C6 C4 DESIGNATION IC1 IC2 IC3 T1, T2 T3 T4 D1 , D2 D3 R1, R3, R5 RIN Rgm R6, R13, R15 R7 R4 R8, R20 R11, R22 R23 R21 R10 R12, R14 R18 R17 R16 R19 2.2M 100k 330 2.7k 1M Capacitor 2.2F Capacitor 10nF Capacitor 220F Capacitor 0.47F Capacitor 470F Capacitor 0.1F Capacitor 1F PREF POT 1k POFFSET POT 10k VIN, VOUT, HK SMA POS, GND, NEG Mini-Banana PART NAME/VALUE OPA621KP CA3080 OPA660AP BC577 2N5460 2N3904 2N2811 IN4148 56 2k 51 100 20k 22k 10k 1k 560k 47k NUMBER OF PARTS 1 1 1 2 1 1 2 1 3 1 1 3 1 1 2 2 1 1 1 2 1 1 1 1 6 6 2 2 1 1 1 1 1 3 3
10
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