100% found this document useful (2 votes)
57 views14 pages

Programming Examples: Bluespec-5

This document discusses encoding and decoding MIPS instructions. It defines types to represent MIPS registers, opcode functions, and a data type for MIPS instructions that includes fields for the opcode, registers, and other values. It shows how to explicitly define pack and unpack functions to encode and decode MIPS instructions as 32-bit values by extracting the field values from the bit patterns. Decoding functions are also defined to check the instruction type based on the opcode bits.

Uploaded by

Raoof Smko
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
100% found this document useful (2 votes)
57 views14 pages

Programming Examples: Bluespec-5

This document discusses encoding and decoding MIPS instructions. It defines types to represent MIPS registers, opcode functions, and a data type for MIPS instructions that includes fields for the opcode, registers, and other values. It shows how to explicitly define pack and unpack functions to encode and decode MIPS instructions as 32-bit values by extracting the field values from the bit patterns. Decoding functions are also defined to check the instruction type based on the opcode bits.

Uploaded by

Raoof Smko
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 14

L21- 1

Bluespec-5
Programming Examples

Arvind
Laboratory for Computer Science
M.I.T.

Lecture 21

http://www.csg.lcs.mit.edu/6.827

L21-2
Arvind

Quiz
• Determine if a n-bit number contains
exactly one “1”.

– solution will be given at the end of the class

http://www.csg.lcs.mit.edu/6.827

L21-3
Arvind

Outline

• Lennart’s problem √

• Instruction Encoding ⇐
– Pack and Unpack

• Wallace Tree Addition

• Solution to Lennart’s problem

http://www.csg.lcs.mit.edu/6.827

L21-4
Arvind

"deriving (Bits)" for algebraic types


data T = A (Bit 3) | B (Bit 5) | Ptr (Bit 31)
deriving (Bits)

• the canonical "pack" function created by


"deriving (Bits)" produces packings as follows:

0 0 a3
0 1 b5
1 1 p31

“33 bit” encoding !

http://www.csg.lcs.mit.edu/6.827

L21-5
Arvind

Explicit pack & unpack


data T = A (Bit 3) | B (Bit 5) | Ptr (Bit 31)
deriving (Bits)
• Explicit "instance" decls. may permit more
efficient packing
instance Bits T 32 where
pack (A a3) = 0b00 ++ (zeroExtend a3)
pack (B b5) = 0b01 ++ (zeroExtend b5)
pack (Ptr p31) =

unpack x = if x[31:30] == 0b00 then A x[2:0]


elseif x[31:30] == 0b01 then B x[4:0]
elseif

t” ! 0 0 a3
bi ing
2 0 1 b5
“3 cod
en 1 p31
http://www.csg.lcs.mit.edu/6.82

L21-6
Arvind

Instruction Encoding: MIPS

6 5 5 5 5 6
Reg-Reg Op Rs1 Rs2 Rd Const Opx

Reg-Imm Op Rs1 Rd Const

Branch Op Opx Rs1 Const

Jump/Call Op Const

http://www.csg.lcs.mit.edu/6.827

L21-7
Arvind

MIPS Instruction Type


data Instruction =
Immediate op :: Op
rs :: CPUReg
rt :: CPUReg
imm :: UInt16
| Register rs :: CPUReg
rt :: CPUReg
rd :: CPUReg
sa :: UInt5
funct :: Funct
| RegImm rs :: CPUReg
op :: REGIMM
imm :: UInt16
| Jump op :: Op
target :: UInt26
| Nop

Need to define CPUReg, UInt5, UInt16, UInt26, REGIMM,


Op and Funct
http://www.csg.lcs.mit.edu/6.827

L21-8
Arvind

CPUReg Type: MIPS Instructions

data CPUReg = Reg0 | Reg1 | Reg2 | Reg3


| Reg4 | Reg5 | Reg6 | Reg7
| Reg8 | Reg9 | Reg10 | Reg11
| Reg12 | Reg13 | Reg14 | Reg15
| Reg16 | Reg17 | Reg18 | Reg19
| Reg20 | Reg21 | Reg22 | Reg23
| Reg24 | Reg25 | Reg26 | Reg27
| Reg28 | Reg29 | Reg30 | Reg31
deriving (Bits, Eq, Bounded)

type UInt32 = Bit 32


type UInt26 = Bit 26
type UInt16 = Bit 16
type UInt5 = Bit 5

http://www.csg.lcs.mit.edu/6.827

L21-9
Arvind

Op Type: MIPS Instructions

data Op = SPECIAL | REGIMM


| J | JAL | BEQ | BNE | BLEZ | BGTZ
| ADDI | ADDIU | SLTI | SLTIU | ANDI | ORI | XORI | LUI
| COP0 | COP1 | COP2 | OP19
| BEQL | BNEL | BLEZL | BGTZL
| DADDIe | DADDIUe | LDLe | LDRe
| OP28 | OP29 | OP30 | OP31
| LB | LH | LWL | LW | LBU | LHU | LWR | LWUe
| SB | SH | SWL | SW | SDLe | SDRe | SWR | CACHEd
| LL | LWC1 | LWC2 | OP51 | LLDe | LDC1 | LDC2 | LDe
| SC | SWC1 | SWC2 | OP59 | SCDe | SDC1 | SDC2 | SDe
deriving (Eq, Bits)

http://www.csg.lcs.mit.edu/6.827

L21-10
Arvind

Funct Type: MIPS Instructions

data Funct = SLL | F1 | SRL | SRA


| SLLV | F5 | SRLV | SRAV
| JR | JALR | F10 | F11
| SYSCALL | BREAK| F14 | SYNC
| MFHI | MTHI | MFLO | MTLO
| DSLLVe | F15 | DSRLVe | DSRAVe
| MULT | MULTU | DIV | DIVU
| DMULTe | DMULTUe | DDIVe | DDIVUe
| ADD | ADDU | SUB | SUBU
| AND | OR | XOR | NOR
| F40 | F41 | SLT | SLTU
| DADDe | DADDUe | DSUBe | DSUBUe
| TGE | TGEU | TLT | TLTU
| TEQ | F53 | TNE | F55
| DSLLe | F57 | DSRLe | DSRAe
| DSLL32e | F61 | DSRL32e | DSRA32e
deriving (Bits,Eq)

http://www.csg.lcs.mit.edu/6.827

L21-11
Arvind

Funct Type: MIPS Instructions

data REGIMM = BLTZ | BGEZ | BLTZL | BGEZL


| R4 | R5 | R6 | R7
| TGEI | TGEIU | TLTI | TLTIU
| TEQI | R13 | TNEI | R15
| BLTZAL | BGEZAL | BLTZALL | BGEZALL
| R20 | R21 | R22 | R23
| R24 | R25 | R26 | R27
| R28 | R29 | R30 | R31
deriving (Bits,Eq)

http://www.csg.lcs.mit.edu/6.827

L21-12
Arvind

Instruction Decode- Pack


instance Bits Instruction 32 where
pack :: Instruction -> Bit 32
pack (Immediate op rs rt imm) =

pack (Register rs rt rd sa funct) =

pack (RegImm rs op imm) =

pack (Jump op target) =

pack (Nop) = 0

http://www.csg.lcs.mit.edu/6.827

L21-13
Arvind

Instruction Decode - Unpack


instance Bits Instruction 32 where
unpack :: Bit 32 -> Instruction
unpack bs when isImmInstr bs = Immediate {
op = unpack bs[31:26];
rs = unpack bs[25:21];
rt = unpack bs[20:16];
imm = unpack bs[15:0]; }

unpack bs when isREGIMMInstr bs = RegImm {


rs = unpack bs[25:21];
op = unpack bs[20:16];
imm = unpack bs[15:0]; }

unpack bs when isJumpInstr bs = Jump {


op = unpack bs[31:26];
target = unpack bs[25:0];}

...

http://www.csg.lcs.mit.edu/6.827

L21-14
Arvind

Decoding Functions
isImmInstr :: Bit (SizeOf Instruction) -> Bool
isImmInstr bs = not (isSpecialInstr bs || isREGIMMInstr bs
|| isJumpInstr bs )

isREGIMMInstr :: Bit (SizeOf Instruction) -> Bool


isREGIMMInstr bs = bs[31:26] == (1::Bit 6)

isJumpInstr :: Bit (SizeOf Instruction) -> Bool


isJumpInstr bs = isJumpOp (unpack bs[31:26])

isSpecialInstr :: Bit (SizeOf Instruction) -> Bool


isSpecialInstr bs = bs[31:26] == (0::Bit 6)

http://www.csg.lcs.mit.edu/6.827

L21-15
Arvind

Outline

• Lennart’s problem √

• Instruction Encoding √
– Pack and Unpack

• Wallace Tree Addition ⇐

• Solution to Lennart’s problem

http://www.csg.lcs.mit.edu/6.827

L21-16
Arvind

Wallace addition
Add several m-bit numbers
am-1 a2 a1 a0

bm-1 b2 b1 b0

cm-1 c2 c1 c0

Bits at 2m-1 Bits at 22 Bits at 21 Bits at 20


http://www.csg.lcs.mit.edu/6.827

L21-17
Arvind

Basic step: idea


aj
FA
FA bj
bag of
FA cj Bits at 2j

smaller smaller (1/3)


bag of bag of
Bits at 2j+1 Bits at 2j

http://www.csg.lcs.mit.edu/6.827

L21-18
Arvind

Step, across all the bags of bits

at 2n-1 N at 22 at 21 at 20
One full wallace step

FAs FAs FAs FAs

ceiling(N/3)
Nil

append append append append append

(discard)
2ceiling(N/3)

at 2n-1 at 23 at 22 at 21 at 20
http://www.csg.lcs.mit.edu/6.827

L21-19
Arvind

Putting it all together

at 2n-1 at 22 at 21 at 20

wallaceStep

wallaceStep

until every bag has 2 bits in it,


at which point we can use normal adder
http://www.csg.lcs.mit.edu/6.827

L21-20
Arvind

Putting it all together


Given a list of numbers x0, x1, ..., xk-1,
– unpack each number into m bits b0, b1, ..., bm-1 (thus the first
element of list will contain the least significant bit of x
– transpose the list of bitbags such that the ith element of the
list contains the ith bit of each of the k numbers
– pad the list with sufficient Nil’s (empty bitbags) so that its
length is equal to n, the desired number of bits in the answer
– apply the Wallace algorithm
– extract the bit from each of the n bitbags
– pack the n bits to form the answer

wallaceAdder = pack · (map head) · wallace ·


padWithNil · transpose · (map unpack)

http://www.csg.lcs.mit.edu/6.827

10

L21-21
Arvind

Basic step: Full adders on a list of bits

type BitBag = List (Bit 1)


step :: (BitBag, BitBag) -> BitBag -> (BitBag, BitBag)
step (cs,ss) Nil = (cs,ss)
step (cs,ss) (Cons x Nil) = (cs,(Cons x ss))
step (cs,ss) (Cons x (Cons y Nil)) =
let (c,s) = halfAdd x y
in ((Cons c cs),(Cons s ss))
step (cs,ss) (Cons x (Cons y (Cons z bs))) =
let (c,s) = fullAdd x y z
in step ((Cons c cs),(Cons s ss)) bs

Apply step to bitbags, i.e. to bag0, bag1, ..., bagn-1

http://www.csg.lcs.mit.edu/6.827

L21-22

Combine:
Arvind

carry-bitbagi and sum-bitbagi+1


combine :: List (BitBag, BitBag) -> List BitBag
carry sum
combine csbags =
zipWith append

wallaceStep :: List BitBag -> List BitBag


wallaceStep bitbags =
combine (map bitbags)

http://www.csg.lcs.mit.edu/6.827

11

L21-23
Arvind

Wallace algorithm
while p f x = if p x then (while p f (f x))
else x
isLengthGT2 x = (length x) > 2
isAnyLengthGT2 xs = foldr (or) False (map isLengthGT2 xs)

wallace :: List BitBag -> List BitBag


wallace bitbags =
let twoNumbers =
while isAnyLengthGT2 wallaceStep bitbags
in fastAdd2 twoNumbers

wallaceAdder = pack · (map head) · wallace ·


padWithNil · transpose · (map unpack)

http://www.csg.lcs.mit.edu/6.827

L21-24
Arvind

Stateful Wallace Step using wallaceStep

wallaceStepM :: (Bit n*k) -> Module (Bit n*k’)


wallaceStepM inReg =
Module
regOut :: (Register (Bit n*k’)) <- mkReg _
inBitbagsN :: ListN n (ListN k (Bit 1))
inBitbagsN = unpack inReg
inBitbags :: List (List (Bit 1))
inBitbags = toList (map toList inBitbagsN)
outBitbags :: List (List (Bit 1))
outBitbags = wallaceStep inBitbags
outBitbagsN :: ListN n (ListN k’ (Bit 1))
outBitbagsN = toListN (map toListN outBitbags)
rules
when True ==> regOut := pack outBitbagsN
interface
regOut.read
http://www.csg.lcs.mit.edu/6.827

12

L21-25
Arvind

Pipelined Wallace
while :: (t->Bool) -> (t->t) -> t -> t
while p f x = if p x then (while p f (f x)) else x

whileM :: (t->Bool) -> (t->(Module t)) -> t -> (Module t)


whileM p f x = if p x then do
x’ <- f x
(whileM p f x’)
else do
return x

wallaceM :: (Bit n*k) -> Module (Bit n*2)


wallaceM = whileM isAnyLengthGT2 wallaceStepM

wallaceM does not work because of types!

http://www.csg.lcs.mit.edu/6.827

L21-26
Arvind

Alternatives
• Write a less parameterized solution.
– Given a k we can figure out how many wallace
iterations are needed and do all the unfolding
manually
• Keep the register size the same after
every iteration
– need to pack the bits in some suitable order
– extra hardware and may be messy coding
– different termination condition
• Fix the language!
– discussions underway

http://www.csg.lcs.mit.edu/6.827

13

L21-27
Arvind

Manual unrolling

wallaceStepM :: (Bit n*k) -> Module (Bit n*k’)

wallaceM :: (Bit n*k) -> Module (Bit n*2)


wallaceM x =
do
x’ :: (Bit n*k’) – k’ is 2 * ceiling (k/3)
x’ <- wallaceStepM x
x’’ :: (Bit n*k’’) – k’’ is 2 * ceiling (k’/3)
x’’ <- wallaceStepM x’
...
return
xfinal

http://www.csg.lcs.mit.edu/6.827

L21-28
Arvind

Lennart’s Borneo Numbers


Determine if a n-bit number contains exactly one “1”.
data Borneo = Zero | One | Many

toB :: Bit 1 -> Borneo


toB 0 = Zero
toB 1 = One

isMany :: Borneo -> Bool


isMany Many = True
isMany _ = False

addB :: Borneo -> Borneo -> Borneo


addB Zero n = n
addB One Zero = One
addB _ _ = Many

http://www.csg.lcs.mit.edu/6.827

14

You might also like