Data Sheet
Data Sheet
CoolSET-F2
ICE2A165/265/365 ICE2A180/280 Off-Line SMPS Current Mode C o n t ro l l e r w i t h i n t e g ra t e d 6 5 0 V / 800V CoolM O S
P o w e r M a n a g em e n t & S u p p l y
N e v e r
s t o p
t h i n k i n g .
CoolSET-F2 Revision History: Previous Version: Page 2001-09-19 First One Datasheet
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Edition 2001-09-19 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 Mnchen
CoolSET-F2
ICE2A165/265/365 ICE2A180/280
P-DIP-8-6
Features
Typical Application
+
RStart-up CVCC
Snubber
Converter DC Output
-
VCC
Low Power StandBy Power Management
Drain Feedback
CoolMOS
SoftS
Soft-Start Control
PWM Controller Current Mode Precise Low Tolerance Peak Current Limitation
CSoft Start
Isense RSense
FB
Protection Unit
PWM-Controller
GND
Feedback
CoolSET-F2
RDSon1) 230VAC 15%2) 3.0 0.9 0.45 3.0 0.8 31W 52W 67W 31W 54W
typ @ T=25C Maximum power rating at Ta=75C, Tj=125C and with copper area on PCB = 6cm,
Datasheet
September 2001
Page
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Overload & Open loop with normal load . . . . . . . . . . . . . . . . . . . . . . . . .12 Overvoltage due to open loop with no load . . . . . . . . . . . . . . . . . . . . . . .13 Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 CoolMOS Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Datasheet
September 2001
1
1.1
Pin 1 2 3 4 5 6 7 8
1) 2)
Function Soft-Start Feedback Controller Current Sense Input, CoolMOS Source Output 650V1)/800V CoolMOS Drain 650V2)/800V CoolMOS Drain Not connected Controller Supply Voltage Controller Ground
at Tj = 110C at Tj = 110C
Package P-DIP-8-6
SoftS
GND
FB
VCC
Isense
N.C
Drain
Drain
Figure 1
Datasheet
September 2001
Figure 2
CLine Snubber + Converter DC Output VOUT CVCC
Datasheet
Drain
Power Management Undervoltage Lockout
13.5V 8.5V 0.72
RStart-up
VCC
Internal Bias
Representative Blockdiagram
Voltage Reference G1 Power-Up Reset Soft Start PWM-Latch
S Q
16.5V
6.5V
4.0V
C2
SoftS
CoolMOS
5.6V G3 G4
R Q S Q R Q
CSoft-Start G2 PWM Comparator 0.3V C5 fosc 100kHz 21.5kHz UFB x3.65 PWM OP Improved Current Mode Current Limiting Propagation-Delay Compensation
0.8V
C4 Gate Driver
5.3V
T1 Error-Latch
6.5V
Spike Blanking 5s
Representative Blockdiagram
6
Current-Limit Comparator Vcsth Leading Edge Blanking 200ns 10k D1 Standby Unit
4.8V
RFB
C3
FB
RSense
Thermal Shutdown
Tj >140C
Isense
Protection Unit
Optocoupler
CoolSET-F2
GND
Representative Blockdiagram
September 2001
3
3.1
Functional Description
Power Management
M ain L in e (1 00 V -3 80 V )
3.2
S o ft-S ta rt C o m p a ra to r P W M -L a tch
R Q
R S tart-U p
P rim ary W in ding
C VC C
VCC Pow er M anagem ent U n de rvolta g e L o ckou t 1 3 .5V 8 .5 V P o w er-D ow n R e set V o lta g e R efe ren ce P o w er-U p R e se t 6.5 V 5.3 V 4.8 V 4.0 V In te rn a l B ias
FB
D rive r P W M C o m p a ra to r
S 0 .8V Q
Q P W M -L atch
6 .5 V S Q
Figure 4
E rro r-L a tch S o ft-S ta rt C om p ara tor
Current Mode
R Soft-Sta rt
S o ftS
Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal.
C S oft-Start
T1
A m p lified C u rren t S ig n al
Figure 3 Power Management
The Undervoltage Lockout monitors the external supply voltage VVCC. In case the IC is inactive the current consumption is max. 55A. When the SMPS is plugged to the main line the current through RStart-up charges the external Capacitor CVCC. When VVCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After it the internal bandgap generates a reference voltage VREF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by reseting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero.
FB
0 .8 V D rive r t
T on t
Figure 5 Pulse Width Modulation In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by reseting the PWM-Latch (see Figure 5).
Datasheet
September 2001
V OSC
m a x. D u ty C yc le
V olta ge R a m p
S oft-S tart C o m p ara to r P W M C o m pa ra to r FB P W M -La tch O s cilla to r V O SC 10k T2 C1 V oltage Ram p
Figure 6 Improved Current Mode
0 .8 V FB 0 .3 V
G a te D rive r
t
Figure 7 Light Load Conditions
3.2.1
PWM-OP
To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1(see Figure 6, Figure 7). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start. In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the C5 Comparator the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continously till 0% by decreasing VFB below that threshold.
The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin ISense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.
3.2.2
PWM-Comparator
The PWM-Comparator compares the sensed current signal of the integrated CoolMOSTM with the feedback signal VFB (see Figure 8). VFB is created by an external optocoupler or external transistor in combination with the internal pullup resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOS exceeds the signal VFB the PWM-Comparator switches off the Gate Driver.
Datasheet
September 2001
P W M C o m p a rato r
0 .8 V
O p to co u p le r
R S o ft-S ta rt S o ftS 6 .5 V 5 .3 V C4 G2
Figure 8
PWM Controlling
3.3
Soft-Start
FB
4 .8 V R FB
C3 C lo c k
G a te D riv e r
S Q
V S oftS
5 .6 V 5 .3 V
P W M -L a tc h
Figure 10
The Start-Up time TStart-Up within the converter output voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 11).
C Soft Start =
By means of Soft-Start there is an effective minimization of current and voltage stresses on the integrated CoolMOS, the clamp circuit and the output overshoot and prevents saturation of the transformer during Start-Up.
t
Figure 9 Soft-Start Phase
The Soft-Start is realized by the internal pullup resistor RSoft-Start and the external Capacitor CSoft-Start (see Figure 2). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal
Datasheet
September 2001
65
T S oft-S ta rt V FB 4 .8 V t
21,5 0,9 1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 1,9 2
V FB
Figure 12 Frequency Dependence
3.5
V OUT V O UT T S ta rt-U p t
Figure 11 Start Up Phase
Current Limiting
3.4
There is a cycle by cycle current limiting realised by the Current-Limit Comparator to provide an overcurrent detection. The source current of the integrated CoolMOSTM is sensed via an external sense resistor RSense . By means of RSense the source current is transformed to a sense voltage VSense. When the voltage VSense exceeds the internal threshold voltage Vcsth the Current-Limit-Comparator immediately turns off the gate drive. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immedeate shut down of the CoolMOS in case of overcurrent.
3.4.1
3.5.1
The oscillator generates a frequency fswitch = 100kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of Dmax=0.72.
V S en s e V c s th t L E B = 22 0 ns
3.4.2
Frequency Reduction
The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 12. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 21.5 kHz to avoid audible noise in any case.
t
Figure 13 Leading Edge Blanking Each time when CoolMOS is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of tLEB = 220ns. During that time the output of the Current-Limit Comparator cannot switch off the gate drive.
Datasheet
10
September 2001
S ig n a l2 I S e ns e I p ea k 2 I p ea k 1 I L im it I O v ers h oo t2
S ig n a l1 t P ro pa ga tion D e la y
I O v e rs ho ot1
V
1,3 1,25 1,2
VSense
1,15 1,1 1,05 1 0,95 0,9 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2
t
Figure 14 Current Limiting The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compensation is integrated to bound the overshoot dependent on dI/dt of the rising primary current. That means the propagation delay time between exceeding the current sense threshold Vcsth and the switch off of CoolMOS is compensated over temperature within a range of at least.
dVSense dt
V s
Figure 16
Overcurrent Shutdown
0 R Sense
dI
peak
dt
dV Sense dt
3.6
PWM-Latch
So current limiting is now capable in a very accurate way (see Figure 16).
VOSC
The oscillator clock output applies a set pulse to the PWM-Latch when initiating CoolMOS conduction. After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of reseting the driver is shut down immediately.
3.7
off time
Driver
VSense Vcsth
Propagation Delay
Signal1
Figure 15
Signal2 t
The driver-stage drives the gate of the CoolMOS and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the CoolMOS threshold. This is achieved by a slope control of the rising edge at the drivers output (see Figure 17). Thus the leading switch on spike is minimized. When CoolMOS is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. At voltages below the undervoltage lockout threshold VVCCoff the gate drive is active low.
Datasheet
11
September 2001
5V
t
t
Figure 17 Gate Rising Slope
S o ftS 5 .3 V S o ft-S ta rt P h a se
3.8
An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5s and the CoolMOS is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode.
D rive r
3.8.1
t VC C 1 3 .5 V 8 .5 V
Figure 18 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure19). The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage VFB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inactivates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VVCC increases till VCCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor RStart-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pullup resistor RSoft-Start . During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload.
Figure 18
C4 G2
C3 FB
R FB
6 .5 V
Figure 19
FB-Detection
Datasheet
12
September 2001
3.8.2
VCC
6 .5 V 1 6 .5 V R S o ft-S ta rt 4 .0 V S o ftS
t
C1
E rro r L a tch G1
C2
S o ft-S ta rt P ha se
C S o ft-S ta rt T1 P o w e r U p R e se t
Figure 21
D rive r T B urs t2 T R es ta rt t
Overvoltage Detection
3.8.3
Thermal Shut Down is latched by the Error-Latch when junction temperature Tj of the pwm controller is exceeding an internal threshold of 140C. In that case the IC switches in Auto Restart Mode.
O ve rvo ltag e D ete ctio n VCC 1 6.5 V 1 3.5 V 8.5 V t
Figure 20
Figure 20 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 21).The overvoltage detection is provided by Comparator C1 only in the first time during the Soft-Start Phase till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case TBurst2 is shorter than TSoft-Start . By means of C2 the normal operation mode is prevented from overvoltage
Note:
All the values which are mentioned in the functional description are typical. Please refer to Electrical Characteristics for min/max limit values.
Datasheet
13
September 2001
4
4.1
Note:
Electrical Characteristics
Absolute Maximum Ratings
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit.
Parameter
Symbol
Limit Values min. max. 650 800 0.2 0.4 0.5 0.2 0.4 1 2 3 1 2 22 6.5 6.5 3 150 150 90 2
Unit
Remarks
Drain Source Voltage ICE2A165/265/365 Drain Source Voltage ICE2A180/280 ICE2A165 Avalanche energy, repetitive tAR limited by ICE2A265 max. Tj=150C1) ICE2A365 ICE2A180 ICE2A280 ICE2A165 Avalanche current, repetitive tAR limited by ICE2A265 max. Tj=150C1) ICE2A365 ICE2A180 ICE2A280 VCC Supply Voltage FB Voltage SoftS Voltage ISense Junction Temperature Storage Temperature Thermal Resistance Junction-Ambient ESD Capability2)
1) 2)
VDS VDS EAR1 EAR2 EAR3 EAR4 EAR5 IAR1 IAR2 IAR3 IAR4 IAR5 VCC VFB VSoftS ISense Tj TS RthJA VESD
V V mJ mJ mJ mJ mJ A A A A A V V V V C C K/W kV
Tj=110C
Repetetive avalanche causes additional power losses that can be calculated as PAV=EAR*f Equivalent to discharging a 100pF capacitor through a 1.5 k series resistor
Datasheet
14
September 2001
Operating Range
Within the operating range the IC operates as described in the functional description.
Parameter
Symbol
Unit
Remarks
4.3
Note:
Characteristics
The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range TJ from 25 C to 125 C.Typical values represent the median values, which are related to 25C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.
4.3.1
Supply Section
Parameter
Symbol min.
Limit Values typ. 27 5.0 6.5 6.7 8.5 6.5 7.7 13.5 8.5 5 max. 55 6.6 7.8 8 9.8 7.8 9 14 5.5
Unit
Test Condition
Start Up Current Supply Current with Inactiv Gate Supply Current with Activ Gate ICE2A165 ICE2A265 ICE2A365 ICE2A180 ICE2A280 VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis
IVCC1 IVCC2 IVCC3 IVCC3 IVCC3 IVCC3 IVCC3 VCCon VCCoff VCCHY
13 4.5
A mA mA mA mA mA mA V V V
VCC=VCCon -0.1V VSoftS = 0 IFB = 0 VSoftS = 5V IFB = 0 VSoftS = 5V IFB = 0 VSoftS = 5V IFB = 0 VSoftS = 5V IFB = 0 VSoftS = 5V IFB = 0
4.3.2
Parameter
Symbol min.
Unit
Test Condition
VREF
6.37
measured at pin FB
Datasheet
15
September 2001
Parameter
Symbol min.
Limit Values typ. 100 21.5 4.65 0.72 3.65 0.80 3.7 50 max. 107 4.9 0.77 3.85 4.6 4.9 62
Unit
Test Condition
Oscillator Frequency Reduced Osc. Frequency Frequency Ratio fosc1/fosc2 Max Duty Cycle Min Duty Cycle PWM-OP Gain Max. Level of Voltage Ramp
kHz kHz
VFB = 4V VFB = 1V
VFB Operating Range Min Level VFBmin VFB Operating Range Max level VFBmax Feedback Resistance Soft-Start Resistance RFB RSoft-Start
4.3.4
Protection Unit
Parameter
Symbol min.
Limit Values typ. 4.8 5.3 4.0 16.5 140 5 max. 4.95 5.46 4.12 17.2 150 -
Unit
Test Condition
Over Load & Open Loop Detection Limit Activation Limit of Overload & Open Loop Detection Deactivation Limit of Overvoltage Detection Overvoltage Detection Limit Latched Thermal Shutdown Spike Blanking
V V V V C s
VSoftS > 5.5V VFB > 5V VFB > 5V VCC > 17.5V VSoftS < 3.8V VFB > 5V guaranteed by design
4.3.5
Current Limiting
Parameter
Symbol min.
Unit
Peak Current Limitation (incl. Propagation Delay Time) (see Figure 7) Leading Edge Blanking
Vcsth
0.95
tLEB
220
ns
Datasheet
16
September 2001
Parameter
Symbol min.
Limit Values typ. 3 6.6 0.9 1.9 0.45 0.95 3 6.6 0.8 1.7 7 21 30 7 22 0.5 30 30
1) 1)
Unit
Test Condition
max. 3.3 7.3 1.08 2.28 0.54 1.14 3.3 7.3 1.06 2.04 V V V V pF pF pF pF pF A ns ns Tj=25C Tj=110C Tj=25C Tj=110C Tj=25C Tj=125C Tj=25C Tj=125C Tj=25C Tj=125C Tj=25C Tj=125C Tj=25C Tj=125C VDS =0V to 480V VDS =0V to 480V VDS =0V to 480V VDS =0V to 640V VDS =0V to 640V VVCC=0V
Drain Source Breakdown Voltage V(BR)DSS ICE2A165/265/365 Drain Source Breakdown Voltage V(BR)DSS ICE2A180/280 Drain Source On-Resistance ICE2A165 ICE2A265 ICE2A365 ICE2A180 ICE2A280 Effective output ICE2A165 capacitance, energy ICE2A265 related ICE2A365 ICE2A180 ICE2A280 Zero Gate Voltage Drain Current Rise Time Fall Time
1)
RDSon1 RDSon2 RDSon3 RDSon4 RDSon5 Co(er)1 Co(er)2 Co(er)3 Co(er)4 Co(er)5 IDSS trise tfall
Datasheet
17
September 2001
5
40 38
13,56 13,54 13,52 13,50 13,48 13,46 13,44 13,42 -25 -15
PI-004-190101
36 34
PI-001-190101
32 30 28 26 24 22 -25 -15
-5
15
25
35
45
55
65
75
85
95
-5
15
25
35
45
55
65
75
85
Figure 22
6,0
Figure 25
8,67
5,7
5,4
PI-003-190101
5,1
4,8
-5
15
25
35
45
55
65
75
85
-5
15
25
35
45
55
65
75
85
Figure 23
9,0 8,6
Figure 26
VCC Turn-On/Off Hysteresis V CCHY [V]
5,10 5,07 5,04 5,01
8,2 7,8
ICE2A365
-5
15
25
35
45
55
65
75
85
-5
15
25
35
45
55
65
75
85
Figure 24
Figure 27
Datasheet
18
September 2001
PI-006-190101
PI-002-190101
7,4
ICE2A280
4,98
4,70 4,68
6,54
4,66 4,64 4,62 4,60 4,58 4,56 4,54 4,52 4,50 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-010-190101
6,50 6,49 6,48 6,47 6,46 6,45 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Figure 28
102,0
Figure 31
0,730 0,728 0,726
101,5 101,0
100,5 100,0
PI-008-190101
99,5 99,0 98,5 98,0 97,5 97,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
-5
15
25
35
45
55
65
75
85
Figure 29
21,8
Figure 32
3,70 3,69 3,68
21,7 21,6
21,4
PI-009-190101
PWM-OP Gain AV
21,5
21,3 21,2 21,1 21,0 20,9 20,8 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
-5
15
25
35
45
55
65
75
85
Figure 30
Figure 33
Datasheet
19
September 2001
5,35 5,34
3,95
5,33 5,32 5,31 5,30 5,29 5,28 5,27 5,26 5,25 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-016-190101
3,75 3,70 3,65 3,60 3,55 3,50 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Figure 34
58 56
Figure 37
4,05 4,04
54 52
PI-014-190101
4,03 4,02 4,01 4,00 3,99 3,98 3,97 3,96 3,95 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-017-190101
50 48 46 44 42 40 -25 -15
-5
15
25
35
45
55
65
75
85
95
Figure 35
4,85 4,84
Figure 38
16,80 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 -25 -15
4,80 4,79 4,78 4,77 4,76 4,75 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
-5
15
25
35
45
55
65
75
85
Figure 36
Figure 39
Datasheet
20
September 2001
PI-018-190101
2,0 1,8
1,6 1,4 1,2 1,0 0,8 0,6 0,4 0,2 0,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-023-190101
ICE2A265
ICE2A280
1,000 0,998 0,996 0,994 0,992 0,990 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Figure 40
280
Figure 43
1,0 0,9
0,8 0,7 0,6 0,5 0,4 0,3 0,2 0,1 0,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2A365
PI-024-190101
230 220 210 200 190 180 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Figure 41
Figure 44
900
7,6
850 800 750 700 650 600 550 500 -25 -15
ICE2A180 ICE2A280
4,6 4,0 3,4 2,8 2,2 1,6 1,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2A165 ICE2A180
-5
15
25
35
45
55
65
75
85
Figure 42
Figure 45
Datasheet
21
September 2001
PI-025-190101
Outline Dimension
Figure 46
Dimensions in mm
Datasheet
22
September 2001
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