Scribd Logo
Upload

Welcome to Scribd!

  • 280 views

    Programmable Asics 4: The Antifuse

    Uploaded by

    Vivek
    The document discusses programmable logic devices like field programmable gate arrays (FPGAs), describing their basic logic cells, I/O logic cells, and programmable interconnect. It covers the different programming technologies used in FPGAs, such as antifuses, static RAM, and EPROM/EEPROM. The document also discusses practical issues in using FPGAs and provides pricing information to illustrate how FPGA costs can vary based on purchase quantity, time, and qualification type.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd

    Programmable Asics 4: The Antifuse

    Uploaded by

    Vivek
    280 views12 pages
    The document discusses programmable logic devices like field programmable gate arrays (FPGAs), describing their basic logic cells, I/O logic cells, and programmable interconnect. It covers the different programming technologies used in FPGAs, such as antifuses, static RAM, and EPROM/EEPROM. The document also discusses practical issues in using FPGAs and provides pricing information to illustrate how FPGA costs can vary based on purchase quantity, time, and qualification type.

    Original Description:

    This a complete book (Chapter-1 to Chapter-17) on ASIC for basic to advanced level understanding.

    Original Title

    ASIC-CH04

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    The document discusses programmable logic devices like field programmable gate arrays (FPGAs), describing their basic logic cells, I/O logic cells, and programmable interconnect. It covers the different programming technologies used in FPGAs, such as antifuses, static RAM, and EPROM/EEPROM. The document also discusses practical issues in using FPGAs and provides pricing information to illustrate how FPGA costs can vary based on purchase quantity, time, and qualification type.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    280 views12 pages

    Programmable Asics 4: The Antifuse

    Uploaded by

    Vivek
    The document discusses programmable logic devices like field programmable gate arrays (FPGAs), describing their basic logic cells, I/O logic cells, and programmable interconnect. It covers the different programming technologies used in FPGAs, such as antifuses, static RAM, and EPROM/EEPROM. The document also discusses practical issues in using FPGAs and provides pricing information to illustrate how FPGA costs can vary based on purchase quantity, time, and qualification type.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 12

    ASICs...

    THE COURSE (1 WEEK)

    PROGRAMMABLE 4
    ASICs
    Key concepts: programmable logic devices (PLDs) • field-programmable gate arrays
    (FPGAs) • programming technology • basic logic cells • I/O logic cells • programmable inter-
    connect • software to design and program the FPGA

    4.1 The Antifuse

    n+ antifuse
    diffusion
    antifuse antifuse antifuse
    antifuse polysilicon link polysilicon antifuse polysilicon
    ONO dielectric

    oxide–nitride–oxide
    (ONO) dielectric
    <10nm contacts
    n+ antifuse diffusion 20nm n+ antifuse
    diffusion
    2λ 2λ 2λ
    (a) (b) (c)

    Actel antifuse
    antifuse • programming current (about 5mA) • (PLICE‘) • oxide–nitride–oxide (ONO) dielec-
    tric • Activator • in-system programming (ISP) • gang programmers • one-time programma-
    ble (OTP) FPGAs

    1
    2 SECTION 4 PROGRAMMABLE ASICs ASICS... THE COURSE

    Number of
    percentage
    antifuses on Actel FPGAs
    100
    Device Antifuses
    A1010 112,000
    A1020 186,000
    0
    A1225 250,000
    A1240 400,000 antifuse resistance/ Ω
    A1280 750,000
    The resistance of blown Actel antifuses
    ASICs... THE COURSE 4.1 The Antifuse 3

    4.1.1 Metal–Metal Antifuse

    (a) link (b) 4λ


    link
    m2 m3
    SiO2 via m2 4λ
    tungsten
    m1 plug
    SiO2
    SiO2
    m2
    2λ
    amorphous Si amorphous Si m3
    2λ 2λ

    Metal–metal antifuse
    QuickLogic metal–metal antifuse (ViaLink‘) • alloy of tungsten, titanium, and silicon • bulk re-
    sistance of about 500mΩcm

    percentage
    100

    Resistance values for the QuickLogic


    metal–metal antifuse
    0

    antifuse resistance/ Ω
    4 SECTION 4 PROGRAMMABLE ASICs ASICS... THE COURSE

    4.2 Static RAM


    Xilinx SRAM (static RAM) configura-
    tion cell Q
    configuration
    • use in reconfigurable hardware control
    Q'
    READ or
    • use of programmable read-only WRITE
    memory or PROM to hold configu-
    DATA
    ration

    4.3 EPROM and EEPROM Technology

    +VGS > V tn +VGS > Vtn hν


    gate2
    UV light
    GND gate1 +VPP GND +VDS

    source drain source drain

    bulk bulk bulk


    GND electrons GND no channel

    (a) (b) (c)

    An EPROM transistor
    (a) With a high (>12V) programming voltage, VPP, applied to the drain, electrons gain
    enough energy to “jump” onto the floating gate (gate1)
    (b) Electrons stuck on gate1 raise the threshold voltage so that the transistor is always off
    for normal operating voltages
    (c) UV light provides enough energy for the electrons stuck on gate1 to “jump” back to the
    bulk, allowing the transistor to operate normally
    Facts and keywords: Altera MAX 5000 EPLDs and Xilinx EPLDs both use UV-erasable
    electrically programmable read-only memory (EPROM) • hot-electron injection or avalanche
    injection • floating-gate avalanche MOS (FAMOS)
    ASICs... THE COURSE 4.4 Practical Issues 5

    4.4 Practical Issues

    Hardware security key


    computer-aided engineering (CAE) tools • PC vs. workstation •
    ease of use • cost of ownership

    4.4.1 FPGAs in Use


    • inventory
    • risk inventory or safety supply
    • just-in-time (JIT)
    • printed-circuit boards (PCBs)
    • pin locking or I/O locking

    4.5 Specifications
    • qualification kit
    • down-binning

    4.6 PREP Benchmarks


    • Programmable Electronics Performance Company (PREP)
    • http://www.prep.org
    6 SECTION 4 PROGRAMMABLE ASICs ASICS... THE COURSE

    4.7 FPGA Economics

    Xilinx part-naming convention


    XC4010-10 PG156C
    Not all parts are available in all packag-
    temperature range
    es
    number of pins
    Some parts are packaged with fewer package
    speed
    leads than I/Os device type

    Programmable ASIC part codes


    Item Code Description Code Description
    Manufac- A Actel ATT AT&T (Lucent)
    turer’s XC Xilinx isp Lattice Logic
    code
    EPM Altera MAX M5 AMD MACH 5 is on the
    device
    EPF Altera FLEX QL QuickLogic
    CY7C Cypress
    Package PL or plastic J-leaded chip carrier, VQ very thin quad flatpack,
    PC PLCC VQFP
    type
    PQ plastic quad flatpack, PQFP TQ thin plastic flatpack, TQFP
    CQ or ceramic quad flatpack, CQFP PP plastic pin-grid array, PPGA
    CB
    PG ceramic pin-grid array, PGA WB, ball-grid array, BGA
    PB
    Application C commercial B MIL-STD-883
    I industrial E extended
    M military
    ASICs... THE COURSE 4.7 FPGA Economics 7

    1992 base Actel 1992 base Xilinx XC3000


    FPGA prices FPGA prices
    1H92 base
    Actel part 1H92 base price Xilinx part
    price
    A1010A-PL44C $23.25 XC3020-50PC68C $26.00
    A1020A-PL44C $43.30 XC3030-50PC44C $34.20
    A1225-PQ100C $105.00 XC3042-50PC84C $52.00
    A1240-PQ144C $175.00 XC3064-50PC84C $87.00
    A1280-PQ160C $305.00 XC3090-50PC84C $133.30
    8 SECTION 4 PROGRAMMABLE ASICs ASICS... THE COURSE

    4.7.1 FPGA Pricing


    “How much do FPGAs cost?” • “How much does a car cost?” • pricing matrix

    Actel price adjustment factors


    Purchase quantity, all types
    (1–9) (10–99) (100–999)
    100% 96% 84%

    Purchase time, in (100–999) quantity


    1H92 2H92 93
    100% 80–95% 60–80%

    Qualification type, same package


    Commercial Industrial Military 883-B
    100% 120% 150% 230–300%
    Speed bin1
    ACT 1-Std ACT 1-1 ACT 1-2 ACT 2-Std ACT 2-1
    100% 115% 140% 100% 120%

    Package type
    A1010: PL44, 64, 84 PQ100 PG84
    100% 125% 400%
    A1020: PL44, 64, 84 PQ100 JQ44, 68, 84 PG84 CQ84
    100% 125% 270% 275% 400%
    A1225: PQ100 PG100
    100% 175%
    A1240: PQ144 PG132
    100% 140%
    A1280: PQ160 PG176 CQ172
    100% 145% 160%
    1
    Actel bins: Std=standard speed grade; 1=medium speed grade; 2=fastest speed grade
    ASICs... THE COURSE 4.7 FPGA Economics 9

    4.7.2 Pricing Examples


    base prices and adjustment factors • “sticker price”

    Example Actel part-price calculation


    Example: A1020A-2-PQ100 in (100–999) quantity, purchased 1H92.
    Factor Example Value
    Base price A1020A $43.30
    Quantity 100–999 84%
    Time 1H92 100%
    Qualification type Industrial (I) 120%
    Speed bin1 2 140%
    Package PQ100 125%
    Estimated price (1H92) $76.38
    Actual Actel price (1H92) $75.60
    1
    The speed bin is a manufacturer’s code (usually a number) that follows the family part number
    and indicates the maximum operating speed of the device

    • Marshall at http://marshall.com, carry Xilinx


    • Hamilton-Avnet, at http://www.hh.avnet.com, carry Xilinx
    • Wyle, at http://www.wyle.com carries Actel and Altera
    10 SECTION 4 PROGRAMMABLE ASICs ASICS... THE COURSE

    4.8 Summary
    Programmable ASIC technologies
    Actel Xilinx LCA1 Altera EPLD Xilinx EPLD
    Programming Poly–diffusion Erasable SRAM UV-erasable UV-erasable
    technology antifuse, PLICE EPROM (MAX 5k) EPROM
    ISP
    EEPROM (MAX
    7/9k)
    Size of Small but requires Two inverters plus One n-channel One n-channel
    programming contacts to metal pass and switch EPROM device. EPROM device.
    element devices. Largest.
    Medium. Medium.
    Process Special: CMOS Standard CMOS Standard EPROM Standard EPROM
    plus three extra and EEPROM
    masks.
    Program- Special hardware PC card, PROM, ISP (MAX 9k) or EPROM program-
    ming method or serial port EPROM program- mer
    mer

    QuickLogic Crosspoint Atmel Altera FLEX


    Programming Metal–metal Metal–polysilicon Erasable SRAM. Erasable SRAM.
    technology antifuse, ViaLink antifuse
    ISP. ISP.
    Size of Smallest Small Two inverters plus Two inverters plus
    programming pass and switch pass and switch
    devices. Largest. devices. Largest.
    element
    Process Special, CMOS Special, CMOS Standard CMOS Standard CMOS
    plus ViaLink plus antifuse
    Program- Special hardware Special hardware PC card, PROM, PC card, PROM,
    ming method or serial port or serial port
    1Lucent (formerly AT&T) FPGAs have almost identical properties to the Xilinx LCA family

    All FPGAs have the following key elements:


    • The programming technology
    • The basic logic cells
    • The I/O logic cells
    • Programmable interconnect
    • Software to design and program the FPGA
    ASICs... THE COURSE 4.9 Problems 11

    4.9 Problems
    12 SECTION 4 PROGRAMMABLE ASICs ASICS... THE COURSE

    You might also like