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ECE 171 Digital Circuits: Prof. Mark G. Faust Maseeh College of Engineering and Computer Science

This document summarizes topics from ECE 171 Digital Circuits Lecture 6, including: 1) Combinational logic circuits have outputs that depend only on current inputs, not previous states. Positive and negative logic representations are discussed. 2) There are 16 possible unique functions for a logic circuit with two variables, as there are 2^2 or 4 rows in the corresponding truth table. 3) Techniques for analyzing, designing, and representing logic circuits are covered, including standard graphic symbols, truth tables, sum-of-products form, and use of NAND/NOR gates for circuit implementation.

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Minh Hoang
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75 views38 pages

ECE 171 Digital Circuits: Prof. Mark G. Faust Maseeh College of Engineering and Computer Science

This document summarizes topics from ECE 171 Digital Circuits Lecture 6, including: 1) Combinational logic circuits have outputs that depend only on current inputs, not previous states. Positive and negative logic representations are discussed. 2) There are 16 possible unique functions for a logic circuit with two variables, as there are 2^2 or 4 rows in the corresponding truth table. 3) Techniques for analyzing, designing, and representing logic circuits are covered, including standard graphic symbols, truth tables, sum-of-products form, and use of NAND/NOR gates for circuit implementation.

Uploaded by

Minh Hoang
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ECE171 DigitalCircuits

Prof.MarkG.Faust MaseehCollegeofEngineering andComputerScience

Lecture6
Topics
CombinationalLogicCircuits
GraphicSymbols(IEEEandIEC) SwitchingCircuits AnalyzingICLogicCircuits DesigningICLogicCircuits DetailedSchematicDiagrams U i Equivalent Using E i l t S Symbols b l

CombinationalLogicCircuits
CombinationalLogic
Outputsdependonlyuponthecurrentinputs(not previousstate)

PositiveLogic
Highvoltage(H)representslogic1(True) SignalBusGrantisassertedHigh

Negative N ti L Logic i
Lowvoltage(L)representslogic1(True) Signal SignalBusRequest#isassertedLow Low
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IEEE: Institute of Electrical and d Electronics El i Engineers E i IEC: International Electrotechnical Commission

n.o. = normally open n.c. = normally closed

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AllPossibleTwoVariableFunctions
Question: How many unique functions of two variables are there?

Recall earlier question

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TruthTables
Question: How many rows are there in a truth table for n variables? 2n B5 B4 B3 B2 B1 B0 F
As many rows as unique combinations of inputs Enumerate by counting in binary 26 =64
0 0000000 1 0000011 2 0000101 3 . . . 63 0000110 . . . 1111111
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TwoVariableFunctions
Question: How many unique combinations of 2n bits? 2
n 2
B5 B4 B3 B2 B1 B0 F 0 0000000 1 0000011

Enumerate by counting in binary 26 =64

2 0000101 3 . . 0000110 . . . 1111111


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264

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AllPossibleTwoVariableFunctions
Question: How many unique functions of two variables are there? B1 B0 F
0 0 0 1 1 0 0 1 1 0 1 1

22 = 4 rows

4 bits

Numberofunique4bitwords=24 =16
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AnalyzingLogicCircuits
X X+Y (X + Y)(X + Z) X+Z

Reference Designators (Instances)


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AnalyzingLogicCircuits
AB AB + BC C

BC

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DesigningLogicCircuits
F1 = ABC + BC + AB
SOP form with 3 terms 3 input OR gate

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DesigningLogicCircuits
F1 = ABC + BC + AB
Complement already available

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SomeTerminology
F1 = ABC + BC + AB
Signal line any wire to a gate input or output

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SomeTerminology
F1 = ABC + BC + AB
Net collection of signal lines which are connected

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SomeTerminology
F1 = ABC + BC + AB
Fan-out Number of inputs an IC output is driving

Fan-out of 2

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SomeTerminology
F1 = ABC + BC + AB
Fan-in Number of inputs to a gate

Fan-in of 3

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VerticalLayout y Scheme SOPForm

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VerticalLayout y Scheme SOPForm

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>2InputORGatesNotAvailable forallICTechnologies
Solution: Cascading gates

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VerticalLayout y Scheme POSForm


F2 = (X+Y)(X+Y)(X+Z)

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DesigningUsingDeMorgan Equivalents
OftenpreferNAND/NORtoAND/ORwhen grealICs using
NAND/NORtypicallyhavemorefanin NAND/NORfunctionally functionallycomplete complete NAND/NORusuallyfasterthanAND/OR

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AND/ORformsofNAND

DeMorgans Theorem

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SummaryofAND/ORforms

Change OR to AND C Complement l t bubbles b bbl

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EquivalentSignalLines

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NAND/NANDExample

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NOR/NORExample

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