® TDA7377

DUAL BTL/QUAD POWER AMPLIFIER FOR CAR RADIO

HIGH OUTPUT POWER CAPABILITY:

2 x 37W max./4Ω
2 x 32W/4Ω EIAJ
2 x 24W/4Ω @14.4V, 1KHz, 10%
4 x 7W/4Ω @14.4V, 1KHz, 10%
4 x 11.5W/2Ω @14.4V, 1KHz, 10%
MINIMUM EXTERNAL COMPONENTS MULTIWATT15V
COUNT: ORDERING NUMBER: TDA7377V
– NO BOOTSTRAP CAPACITORS
– NO BOUCHEROT CELLS
– INTERNALLY FIXED GAIN (26dB BTL)
ST-BY FUNCTION (CMOS COMPATIBLE) – TO VS
NO AUDIBLE POP DURING ST-BY OPERATIONS – ACROSS THE LOAD
DIAGNOSTICS FACILITY FOR: SOFT SHORT AT TURN-ON
– CLIPPING OVERRATING CHIP TEMPERATURE WITH
– OUT TO GND SHORT SOFT THERMAL LIMITER
– OUT TO VS SHORT LOAD DUMP VOLTAGE SURGE
– SOFT SHORT AT TURN-ON
VERY INDUCTIVE LOADS
– THERMAL SHUTDOWN PROXIMITY
FORTUITOUS OPEN GND
Protections:
REVERSED BATTERY
OUPUT AC/DC SHORT CIRCUIT
– TO GND ESD

BLOCK DIAGRAM

DIAGNOSTICS

September 1998 1/14

TDA7377

DESCRIPTION the output stage and the internally fixed gain

guarantees the highest possible power perform-
The TDA7377 is a new technology class AB car ances with extremely reduced component count.
radio amplifier able to work either in DUAL The on-board clip detector simplifies gain com-
BRIDGE or QUAD SINGLE ENDED configura- pression operation. The fault diagnostics makes it
tion. possible to detect mistakes during car radio set
The exclusive fully complementary structure of assembly and wiring in the car.
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
Vop Operating Supply Voltage 18 V
VS DC Supply Voltage 28 V
Vpeak Peak Supply Voltage (for t = 50ms) 40 V
IO Output Peak Current (not repetitive t = 100µs) 4.5 A
IO Output Peak Current (repetitive f > 10Hz) 3.5 A
Ptot Power Dissipation (Tcase = 85°C) 36 W
Tstg, Tj Storage and Junction Temperature -40 to 150 °C

THERMAL DATA
Symbol Description Value Unit
Rth j-case Thermal Resistance Junction-case Max 1.8 °C/W

PIN CONNECTION (Top view)

DIAGNOSTICS

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 TDA7377

ELECTRICAL CHARACTERISTICS (Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz;

Tamb = 25°C, unless otherwise specified
Symbol Parameter Test Condition Min. Typ. Max. Unit
VS Supply Voltage Range 8 18 V
Id Total Quiescent Drain Current RL = ∞ 150 mA
VOS Output Offset Voltage 150 mV
PO Output Power THD = 10%; RL = 4Ω
Bridge 21 24 W
Single Ended 6.5 7 W
Single Ended, RL = 2Ω 11.5 W
PO max Max. Output Power (***) VS = 14.4V, Bridge 33 37 W
PO EIAJ EIAJ Output Power (***) VS = 13.7V, Bridge 28 32 W
THD Distortion RL = 4Ω
Single Ended, PO = 0.1 to 4W 0.02 %
Bridge, PO = 0.1 to 10W 0.03 0.3 %
CT Cross Talk f = 1KHz Single Ended 70 dB
f = 10KHz Single Ended 60 dB
f = 1KHz Bridge 55 dB
f = 10KHz Bridge 60 dB
RIN Input Impedance Single Ended 20 30 KΩ
Bridge 10 15 KΩ
GV Voltage Gain Single Ended 19 20 21 dB
Bridge 25 26 27 dB
GV Voltage Gain Match 0.5 dB
EIN Input Noise Voltage Rg = 0; "A" weighted, S.E.
Non Inverting Channels 2 µV
Inverting Channels 5 µV
Bridge
Rg = 0; 22Hz to 22KHz 3.5 µV
SVR Supply Voltage Rejection Rg = 0; f = 300Hz 50 dB
ASB Stand-by Attenuation PO = 1W 80 90 dB
ISB ST-BY Current Consumption VST-BY = 0 to 1.5V 100 µA
VSB ST-BY In Threshold Voltage 1.5 V
VSB ST-BY Out Threshold Voltage 3.5 V
Ipin7 ST-BY Pin Current Play Mode Vpin7 = 5V 50 µA
Max Driving Current Under 5 mA
Fault (*)
Icd off Clipping Detector d = 1% (**) 90 µA
Output Average Current
Icd on Clipping Detector d = 5% (**) 160 µA
Output Average Current
Vsat pin10 Voltage Saturation on pin 10 Sink Current at Pin 10 = 1mA 0.7 V
(*) See built-in S/C protection description
(**) Pin 10 Pulled-up to 5V with 10KΩ; RL = 4Ω
(***) Saturated square wave output.

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TDA7377

STANDARD TEST AND APPLICATION CIRCUIT

Figure 1: Quad Stereo

10K R1
ST-BY VS
C7 C6 C5
10µF 100nF 1000µF

7 13 3
IN FL 4 1
C1 0.22µF C10 2200µF OUT FL
IN FR 5
2
C2 0.22µF
C9 2200µF OUT FR
IN RL 12
C4 0.22µF 15
IN RR 11 C11 2200µF OUT RL
Note: C3 0.22µF
C9, C10, C11, C12 could be 14
6
reduced if the 2Ω operation is not 8 9 10 C12 2200µF OUT RR
required. C8 47µF
DIAGNOSTICS
D94AU063A

Figure 2: Double Bridge

10K R1
ST-BY VS
C5 C4 C3
10µF 100nF 1000µF

7 13 3
IN L 4 1
C1 0.47µF 5 OUT L
2
IN R 12
15
C2 0.47µF 11
OUT R
6 14
C8 47µF 8 9 10

DIAGNOSTICS
D94AU064A

Figure 3: Stereo/Bridge

10K
ST-BY VS
10µF 100nF 1000µF

7 13 3
IN L 4 1
OUT L
0.22µF 2200µF
IN L 5 2
OUT R
0.22µF 2200µF
IN BRIDGE 12 15
0.47µF 11 OUT
BRIDGE
6 14
8 9 10
47µF
DIAGNOSTICS
D94AU065A

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 TDA7377

Figure 4: P.C. Board and Component Layout of the fig.1 (1:1 scale).

Figure 5: P.C. Board and Component Layout of the fig.2 (1:1 scale).

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TDA7377

Figure 6: Quiescent Drain Current vs. Supply Figure 7: Quiescent Output Voltage vs. Supply
Voltage (Single Ended and Bridge). Voltage (Single Ended and Bridge).

RL = 4Ω RL = 4Ω
Vi = 0 Vi = 0

Figure 8: Output Power vs. Supply Voltage Figure 9: Output Power vs. Supply Voltage

Po (W) Po (W)
20 12
18 11
16 THD= 10 % 10 SINGLE ENDED THD= 10 %
SINGLE ENDED
RL= 2 Ω
9 RL= 4Ω
14
f= 1 KHz 8 f= 1 KHz
12 7
10 6
8 THD= 1 % 5 THD= 1 %

6 4
4 3
2
2
1
0 0
8 9 10 11 12 13 14 15 16 17 18 8 9 10 11 12 13 14 15 16 17 18
Vs (V) Vs (V)

Figure 10: Output Power vs. Supply Voltage Figure 11: Distortion vs. Output Power

Po (W)
44 THD (%)
10
40 SINGLE ENDED
36 BRIDGE THD= 10 %
Vs= 14.4 V
1 RL= 2Ω
32 RL= 4 Ω
f= 15 KHz
28 f= 1 KHz

24 0.1
20
THD= 1 %
16 f= 1 KHz
0.01
12
8
4 0.001
8 9 10 11 12 13 14 15 16 17 18 0 1 2 3 4 5 6 7 8 9 10 11 12
Vs (V) Po (W)

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 TDA7377

Figure 12: Distortion vs. Output Power Figure 13: Distortion vs. Output Power

THD (%) THD (%)

10 10
BRIDGE
SINGLE ENDED
Vs= 14.4 V Vs= 14.4 V
1 RL= 4Ω 1 RL= 4Ω
f= 15 KHz
f= 15 KHz

0.1 0.1

f= 1 KHz
0.01 f= 1 KHz 0.01

0.001 0.001
0 1 2 3 4 5 6 7 0 2 4 6 8 10 12 14 16 18 20 22 24 26
Po (W) Po (W)

Figure 14: Cross-talk vs. Frequency Figure 15: Supply Voltage Rejection vs. Fre-
quency

S.E. BTL
VS = 14.4V Rg = 0
RL = 4Ω CSVR = 47µF
Rg = 10Ω Vripple = 1Vrms

Figure 16: Supply Voltage Rejection vs. Frequency Figure 17: Stand-by Attenuation vs. Threshold
Voltage

S.E.
Rg = 0 BTL & S.E.
CSVR = 47µF VS = 14.4V
Vripple = 1Vrms RL = 4Ω
0 dB = 1W

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TDA7377

Figure 18: Total Power Dissipation and Effi- Figure 19: Total Power Dissipation and Effi-
ciency vs. Output Power ciency vs. Output Power.

Ptot

n Ptot
S.E.
VS = 14.4V BTL
RL = 4 x 4Ω VS = 14.4V
f = 1KHz RL = 2 x 4Ω
f = 1KHz

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 TDA7377

GENERAL STRUCTURE OUTPUT STAGE

High Application Flexibility The fully complementary output stage was made
The availability of 4 independent channels makes possible by the development of a new compo-
it possible to accomplish several kinds of applica- nent: the ST exclusive power ICV PNP.
tions ranging from 4 speakers stereo (F/R) to 2 A novel design based upon the connection shown
speakers bridge solutions. in fig. 20 has then allowed the full exploitation of
In case of working in single ended conditions the its possibilities.
polarity of the speakers driven by the inverting The clear advantages this new approach has over
amplifier must be reversed respect to those classical output stages are as follows:
driven by non inverting channels.
This is to avoid phase inconveniences causing
sound alterations especially during the reproduc-
tion of low frequencies. Rail-to-Rail Output Voltage Swing With No
Need of Bootstrap Capacitors.
The output swing is limited only by the VCEsat
Easy Single Ended to Bridge Transition
of the output transistors, which is in the range
The change from single ended to bridge configu- of 0.3Ω (Rsat) each.
rations is made simply by means of a short circuit Classical solutions adopting composite PNP-
across the inputs, that is no need of further exter- NPN for the upper output stage have higher
nal components. saturation loss on the top side of the wave-
form. This unbalanced saturation causes a sig-
Gain Internally Fixed to 20dB in Single Ended, nificant power reduction. The only way to re-
26dB in Bridge cover power consists of the addition of
Advantages of this design choice are in terms of: expensive bootstrap capacitors.
components and space saving Absolute Stability Without Any External
output noise, supply voltage rejection and dis- Compensation.
tortion optimization. Referring to the circuit of fig. 20 the gain
VOut/VIn is greater than unity, approximately 1+
R2/R1. The DC output (VCC/2) is fixed by an
Silent Turn On/Off and Muting/Stand-by Func- auxiliary amplifier common to all the channels.
tion By controlling the amount of this local feedback it
The stand-by can be easily activated by means of is possible to force the loop gain (A*β) to less
a CMOS level applied to pin 7 through a RC filter. than unity at frequency for which the phase shift
Under stand-by condition the device is turned off is 180°. This means that the output buffer is in-
completely (supply current = 1µA typ.; output at- trinsically stable and not prone to oscillation.
tenuation = 80dB min.). Most remarkably, the above feature has been
Every ON/OFF operation is virtually pop free. achieved in spite of the very low closed loop
Furthemore, at turn-on the device stays in muting gain of the amplifier.
condition for a time determined by the value as-
In contrast, with the classical PNP-NPN stage,
signed to the SVR capacitor.
While in muting the device outputs becomes in- the solution adopted for reducing the gain at
sensitive to any kinds of signal that may be pre- high frequencies makes use of external RC
sent at the input terminals. In other words every networks, namely the Boucherot cells.
transient coming from previous stages produces
no unplesant acoustic effect to the speakers.
Figure 20: The New Output Stage
STAND-BY DRIVING (pin 7)
Some precautions have to be taken in the defini-
tion of stand-by driving networks: pin 7 cannot be
directly driven by a voltage source whose current
capability is higher than 5mA. In practical cases
a series resistance has always to be inserted,
having it the double purpose of limiting the cur-
rent at pin 7 and to smooth down the stand-by
ON/OFF transitions - in combination with a ca-
pacitor - for output pop prevention.
In any case, a capacitor of at least 100nF from
pin 7 to S-GND, with no resistance in between, is
necessary to ensure correct turn-on.

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TDA7377

BUILT–IN SHORT CIRCUIT PROTECTION Figure 22: Clipping Detection Waveforms

Reliable and safe operation, in presence of all
kinds of short circuit involving the outputs is as-
sured by BUILT-IN protectors. Additionally to the
AC/DC short circuit to GND, to VS, across the
speaker, a SOFT SHORT condition is signalled
out during the TURN-ON PHASE so assuring cor-
rect operation for the device itself and for the
loudspeaker.
This particular kind of protection acts in a way to
avoid that the device is turned on (by ST-BY)
when a resistive path (less than 16 ohms) is pre-
sent between the output and GND. As the in-
volved circuitry is normally disabled when a cur-
rent higher than 5mA is flowing into the ST-BY
pin, it is important, in order not to disable it, to
have the external current source driving the ST-
BY pin limited to 5mA.
This extra function becomes particularly attractive
when, in the single ended configuration, one ca-
pacitor is shared between two outputs (see fig.
21).
Figure 21.

A current sinking at pin 10 is triggered when a

certain distortion level is reached at any of the
outputs. This function allows gain compression
possibility whenever the amplifier is overdriven.

Thermal Shutdown
In this case the output 10 will signal the proximity
of the junction temperature to the shutdown
threshold. Typically current sinking at pin 10 will
start ~10°C before the shutdown threshold is
reached.
Figure 23: Output Fault Waveforms (see fig. 24)
Supposing that the output capacitor Cout for any
reason is shorted, the loudspeaker will not be
damaged being this soft short circuit condition re-
vealed.

Diagnostics Facility
The TDA7377 is equipped with a diagnostic cir-
cuitry able to detect the following events:
Clipping in the output signal
Thermal shutdown
Output fault:
– short to GND TDA7377
– short to VS
– soft short at turn on
The information is available across an open
collector output (pin 10) through a current sink-
ing when the event is detected

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 TDA7377

Figure 24: Fault Waveforms

ST-BY PIN
VOLTAGE

2V
t
OUT TO Vs SHORT

OUTPUT
WAVEFORM
SOFT SHORT

OUT TO GND SHORT

Vpin 10 CORRECT TURN-ON

FAULT DETECTION

CHECK AT TURN-ON SHORT TO GND

D94AU149A
(TEST PHASE) OR TO Vs

HANDLING OF THE DIAGNOSTICS INFORMA- proximity), this signal must be handled properly in
TION order to discriminate each event.
This could be done by taking into account the dif-
As various kinds of information is available at the ferent timing of the diagnostic output during each
same pin (clipping detection, output fault, thermal case.
Figure 25: Waveforms

ST-BY PIN
VOLTAGE

Vs

OUTPUT
WAVEFORM

Vpin 10
WAVEFORM

t
CLIPPING
SHORT TO GND THERMAL
D94AU150
OR TO Vs PROXIMITY

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TDA7377

Normally the clip detector signalling produces a an interface circuitry to differentiate the informa-
low level at pin 10 that is shorter than that present tion is represented in the schematic of fig. 26.
under faulty conditions; based on this assumption
Figure 26.

TDA7377

PCB-LAYOUT GROUNDING (general rules) ments are as follows:

The device has 2 distinct ground leads, P-GND STANDBY CAPACITOR, pin 7 (or any other
(POWER GROUND) and S-GND (SIGNAL standby driving networks): on S-GND
GROUND) which are practically disconnected SVR CAPACITOR (pin 6): on S-GND and to be
from each other at chip level. Proper operation re- placed as close as possible to the device.
quires that P-GND and S-GND leads be con- INPUT SIGNAL GROUND (from active/passive
nected together on the PCB-layout by means of signal processor stages): on S-GND.
reasonably low-resistance tracks.
SUPPLY FILTERING CAPACITORS (pins 3,13):
As for the PCB-ground configuration, a star-like on P-GND. The (-) terminal of the electrolytic ca-
arrangement whose center is represented by the pacitor has to be directly tied to the battery (-) line
supply-filtering electrolytic capacitor ground is and this should represent the starting point for all
highly advisable. In such context, at least 2 sepa- the ground paths.
rate paths have to be provided, one for P-GND
and one for S-GND. The correct ground assign-

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 TDA7377

MULTIWATT 15 VERTICAL PACKAGE MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 5 0.197
B 2.65 0.104
C 1.6 0.063
D 1 0.039
E 0.49 0.55 0.019 0.022
F 0.66 0.75 0.026 0.030
G 1.02 1.27 1.52 0.040 0.050 0.060
G1 17.53 17.78 18.03 0.690 0.700 0.710
H1 19.6 0.772
H2 20.2 0.795
L 21.9 22.2 22.5 0.862 0.874 0.886
L1 21.7 22.1 22.5 0.854 0.870 0.886
L2 17.65 18.1 0.695 0.713
L3 17.25 17.5 17.75 0.679 0.689 0.699
L4 10.3 10.7 10.9 0.406 0.421 0.429
L7 2.65 2.9 0.104 0.114
M 4.25 4.55 4.85 0.167 0.179 0.191
M1 4.63 5.08 5.53 0.182 0.200 0.218
S 1.9 2.6 0.075 0.102
S1 1.9 2.6 0.075 0.102
Dia1 3.65 3.85 0.144 0.152

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TDA7377

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
MULTIWATT® is a Registered Trademark of the STMicroelectronics
© 1998 STMicroelectronics – Printed in Italy – All Rights Reserved
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