COURSE FILE (COURSE PLAN) Faculty Details

Name of the Faculty Designation Institution Mr. RAHUL NIGAM Assistant Professor J.I.T. Borawan

Year : 2013-14 Sem: III

Course Details
Name of the Programme Branch Title of the Subject Electronics and Comm. Engineering Network Analysis CORE Subject. Semester Subject Code No. of Students III EC - 305 84 B. E. Batch A&B

Note to the Faculty Members on how to use this course file format: 1. 2. 3. 4. 5. 6. 7. Get a new file from your office for each course and file each sheet of these formats as and when it is complete. Time Table and syllabus copy provided to you may also be filed in it. Please attach the Marks List of the students in respect of Midterm (Continuous Assessment Exam), and Internal Assessment for this subject in your Course File Photocopy of the best and the worst answer sheets for midterm; be included in the Course File. List of Assignments / Seminar Topics you have given to students should also be included in the Course File. Model Question Paper, which you have distributed to the students in the beginning of the Semester for the subject should be included in the Course File. Any additional resources like OHP transparencies, handouts used may also be filed in it.

Year : 2013-14 STATUS PAPER Sem: III

Name of the Faculty Subject Branch : Mr RAHUL NIGAM : Network Analysis Subject Code: EC - 305

: Electronics and Comm. Engineering

1.

TARGET a) Percentage Pass b) Percentage I class - 90 % - 75 %

2.

COURSE PLAN

(Please write how you intend to cover the contents: i.e., coverage of Units by lectures, guest lectures, design exercises, solving numerical problems, demonstration of models, model preparation, or by assignments, etc.) Course may be completed through Lectures, solving problems and by assignments.

3.

METHOD OF EVALUATION 3.1. Continuous Assessment Examinations (Mid Term Exam) marks 3.2. 3.3. 3.4. 3.5. 3.6. Assignments / Seminars Mini Projects Quiz Term End Examination Others marks marks marks marks

4.

List out any new topic(s) or any innovation you would like to introduce in teaching the subject in this Semester.

Signature of the Director of Institution Date:

Signature of Faculty Date:

GUIDELINES TO STUDY THIS COURSE

Name of the Faculty Subject Branch : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

Year : 2013-14 Sem: III

: Electronics and Comm. Engineering

4. Guidelines to Study the Subject

Should have own copy of the prescribed text book. Should concentrate and note down important points during the lecture sessions. Should ask questions to clarify doubts. Should discuss with their faculty in charge for more information on the subject. All the numerical should be worked out from the text book. Refer to books/journals in the library to update information on the topics Go through the websites to get latest information to update information on recent developments in the area across the world. Most important, study the topics discussed in the class on the same day so that it will be easy to understand Students need to study more reference books, magazines and related journal articles to know the latest developments.

COURSE OBJECTIVES

Year : 2013-14 Sem: III

Name of the Faculty Subject Branch

: Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering

4. On completion of this Subject / Course the student shall be able to: S.No . Objectives Outcomes Define Identify Distinguish Application Give example Define Application Categorize Explain Give example Define Identify Application Distinguish Give example Define Identify Application Give example Define Compute Application Categorize Justify Give example

1.

To know about circuit elements.

2.

To know about Network topology and Network Theorems.

3.

To know about Transient analysis and Steady state analysis.

4.

To do Frequency domain analysis using Laplace transform and Fourier Series.

5.

To understand about Network function & Two port networks and parameters.

Signature of Faculty Date:

Note: For each of the OBJECTIVE indicate the appropriate OUTCOMES to be achieved. Kindly refer Page 16, to know the illustrative verbs that can be used to state the objectives.

Year : 2013-14 COURSE OUTCOMES Sem: III

Name of the Faculty Subject Branch S.No. A. B. C. D. E. : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering General Categories of Outcomes

An ability to apply knowledge of mathematics, science, and engineering An ability to design and conduct experiments, as well as to analyze and interpret data An ability to identify, formulate, and solve engineering problems A recognition of the need for, and an ability to engage in life-long learning An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.

4. The expected outcomes of the Course / Subject are: Specific Outcomes of the Course Knowledge of Specification of Synchronous sequential systems and Asynchronous Sequential Machine Can be analyzed and Interpret data in Algorithmic state machine design Fault Detection in combinational circuit CMOS VLSI circuit and CAD Tools Analysis and knowledge of Fault Detection in combinational circuit and PLDs

5. Objectives Outcome Relationship Matrix (Indicate the relationships by mark).

Outcomes Objectives

1. 2. 3. 4. 5.

Year : 2013-14 COURSE SCHEDULE Sem: III

Name of the Faculty Subject Branch : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering Duration (Date) Total No. of Periods

4. The Schedule for the whole Course / Subject is: S. No. Description Introduction to circuit elements R, L, C and their characteristics in terms of linearity and time dependence, KCL and KVL analysis, dual networks, analysis of magnetically coupled circuits, Dot convention, coupling coefficient, Tuned circuits, Series and parallel resonance, voltage and current sources, controlled sources Network topology, Concept of Network graph, Tree, tree branches and links, cut set and tie set schedules. Network Theorems Thevenin, Norton, Superposition, Reciprocity, Compensation, Maximum power transfer and Millmans theorems, problems with controlled sources. Transient analysis: Transients in RL, RC and RLC circuits, initial conditions, time constants, networks driven by constant driving sources and their solutions. Steady state analysis: - Concepts of phasors and vectors, impedance and admittance. Node and mesh analysis of RL, RC and RLC networks with sinusoidal and other driving sources. Resonance Circuits. Frequency domain analysis Laplace transform solution of Integral-differential equations. Transform of waveform step, ramp, Gate and sinusoidal functions. Initial and final value theorem. Network Theorems in frequency domain. Fourier Series, Trigonometric & exponential form of fourier series, Fourier series of basic functions. Network function & Two port networks concept of complex frequency.Network functions of one and two ports, poles and zeros network of different kinds. Necessary conditions for driving point & transfer function. Two port parameters Z, Y, ABCD, hybrid parameters, their inverse and image parameters, relationship between parameters. Interconnection of two port networks, Terminated two port networks.

From

To

1.

26/02/13

08/03/13

07

2.

17/01/13

22/02/13

14

3.

17/04/13

26/04/13

04

4.

27/04/13

03/05/13

04

5.

12/03/13

17/04/13

Total No. of Instructional periods available for the course: 45 Hours / Periods

SCHEDULE OF INSTRUCTIONS UNIT - II

Name of the Faculty Subject Branch SI. No. Date 17/01/13 18/01/13 21/01/13 23/01/13 04/02/13 05/02/13 : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

Year : 2013-14 Sem: III

: Electronics and Comm. Engineering No. of Period Topics / Sub Topics Objectives & Outcome Nos. Define Application Define Application Give example Define Explain Define Application Give example Give example Identify Give example Give example Define Application Give example Define Application Give example Define Application Give example Explain Give example Explain Give example Explain Application References (Text Book, Journal) Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi DELD-II by Nisha Shukla DELD-II by Nisha Shukla DELD-II by Nisha Shukla DELD-II by Nisha Shukla DELD-II by Nisha Shukla Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi DELD-II by Nisha Shukla

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14.

I I I I I I I I I I I I I I

Basic of vcs /dcs Synch. Seq. Circuits, state diagram state table Basics of flip flop Sequential machine design Synchronous sequential machine Serial adder Sequence detector design sequential circuit design sequential circuit design Mealy and Moore model machines state table and transition diagram Mealy - Moore model machines conversions Minimization of the state table Minimization of the state table Summary of unit II and Introduction of unit I

09/02/13

12/02/13

13/02/13 14/02/13 15/02/13 20/02/13 21/02/13 22/02/13

Signature of Faculty Date: Note: 1. ENSURE THAT ALL TOPICS SPECIFIED IN THE COURSE ARE MENTIONED. 2. ADDITIONAL TOPICS COVERED, IF ANY, MAY ALSO BE SPECIFIED BOLDLY. 3. MENTION THE CORRESPONDING COURSE OBJECTIVE AND OUT COME NUMBERS AGAINST EACH TOPIC.

SCHEDULE OF INSTRUCTIONS UNIT - I

Name of the Faculty Subject Branch : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

Year : 2013-14 Sem: III

: Electronics and Comm. Engineering No. of Perio ds Objectives & Outcome Nos. Define Identify Application Distinguish Give example Identify Give example Define Distinguish Application Give example Distinguish Application Give example Define Identify Application Application Give example References (Text Book, Journal) Page No___ to ___ PPT

SI. No.

Date

Topics / Sub Topics Introduction to CMOS VLSI circuit, VLSI design flow MOS Transistor as a Switches, CMOS Logic,

1. 2. 3.

26/02/13 27/02/13 28/02/13

I I I

CMOS VLSI DesignNeil Weste CMOS VLSI DesignNeil Weste

Combinational circuit, latches and register

4.

29/02/13

Design strategies ,Hierarchy, regularity, modularity, locality

PPT

5. 6. 7.

05/03/13

I I I

Introduction of CAD Tool Design entry, synthesis, functional simulation Summary of unit I and Introduction of unit V

PPT

06/03/13 08/03/13

PPT PPT

Signature of Faculty Date: Note: 1. ENSURE THAT ALL TOPICS SPECIFIED IN THE COURSE ARE MENTIONED. 2. ADDITIONAL TOPICS COVERED, IF ANY, MAY ALSO BE SPECIFIED BOLDLY. 3. MENTION THE CORRESPONDING COURSE OBJECTIVE AND OUT COME NUMBERS AGAINST EACH TOPIC.

SCHEDULE OF INSTRUCTIONS UNIT V

Name of the Faculty Subject Branch SI. No. Date : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

Year : 2013-14 Sem: III

: Electronics and Comm. Engineering No. of Peri ods Topics / Sub Topics Objectives & Outcome Nos. Define Application Categorize Give example Define Application Categorize Give example Define Application Give example Define Application Define Application Define Compute Application Give example Compute Justify Give example Define Compute Give example Define Compute Application References (Text Book, Journal) Page No___ to ___

1.

12/03/13

Introduction to PLD

PPT

2.

13/03/13

Concept of PROM, PLA, PAL

PPT

3. 4. 5. 6.

14/03/13 15/03/13 16/03/13

I I I I

CPLD and FPGA FPGA and its application PALASM software applications

PPT

PPT DELD-II by Nisha Shukla Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi

19/03/13

Fault model, Types of faults

7.

08/04/13

Fault detection using Boolean Difference

8. 9.

09/04/13

I I

path sensitization method Summary of unit V and Introduction of unit III

17/04/13

Signature of Faculty Date: Note: 1. ENSURE THAT ALL TOPICS SPECIFIED IN THE COURSE ARE MENTIONED. 2. ADDITIONAL TOPICS COVERED, IF ANY, MAY ALSO BE SPECIFIED BOLDLY. 3. MENTION THE CORRESPONDING COURSE OBJECTIVE AND OUT COME NUMBERS AGAINST EACH TOPIC.

SCHEDULE OF INSTRUCTIONS UNIT III

Name of the Faculty Subject Branch : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

Year : 2013-14 Sem: III

: Electronics and Comm. Engineering

SI. No.

Date

No. of Perio ds

Topics / Sub Topics Fundamental mode and Pulse mode asynchronous sequential machine Non critical and critical races, cycles

Objectives & Outcome Nos. Define Application Distinguish Define Identify Give example Application Give example Define Identify Give example

References (Text Book, Journal) Page No___ to ___ Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi Switching and Finite Automata theory by Kohavi

1. 2. 3. 4.

17/04/13

I I I I

18/04/13

24/04/13

Secondary state assignments in asynchronous sequential machine

26/04/13

Types of hazards and its removal method

Signature of Faculty Date: Note: 1. ENSURE THAT ALL TOPICS SPECIFIED IN THE COURSE ARE MENTIONED. 2. ADDITIONAL TOPICS COVERED, IF ANY, MAY ALSO BE SPECIFIED BOLDLY. 3. MENTION THE CORRESPONDING COURSE OBJECTIVE AND OUT COME NUMBERS AGAINST EACH TOPIC.

SCHEDULE OF INSTRUCTIONS UNIT IV

Name of the Faculty Subject Branch SI. No. Date : Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

Year : 2013-14 Sem: III

: Electronics and Comm. Engineering No. of Peri ods Topics / Sub Topics Objectives & Outcome Nos. Define Identify Application Define Identify Application Give example Define Identify Application Give example Define Identify Application Give example References (Text Book, Journal) Page No___ to ___ DELD-II by Nisha Shukla DELD-II by Nisha Shukla

1.

27/04/13

Algorithmic state machine

2.

29/04/13

fundamental concept of hardware/ firmware algorithms

3.

01/05/13

Controllers and data system designing

DELD-II by Nisha Shukla

4.

03/05/13

Controllers and data system designing

DELD-II by Nisha Shukla

Signature of Faculty Date: Note: 1. ENSURE THAT ALL TOPICS SPECIFIED IN THE COURSE ARE MENTIONED. 2. ADDITIONAL TOPICS COVERED, IF ANY, MAY ALSO BE SPECIFIED BOLDLY. 3. MENTION THE CORRESPONDING COURSE OBJECTIVE AND OUTCOME NUMBERS AGAINST EACH TOPIC.

COURSE COMPLETION STATUS

Year : 2013-14 Sem: III

Name of the Faculty Subject Branch

: Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering

4. Actual Date of Completion & Remarks, if any Units Unit 1 Unit 2 Unit 3 Unit 4 Unit 5 Remarks Nos. of Objectives Achieved 5 5 4 5 6

Signature of the Director of the Institution Date: NOTE: AFTER THE COMPLETION OF EACH UNIT MENTION THE NUMBER OF OBJECTIVES ACHIEVED.

Signature of Faculty Date:

TUTORIAL SHEETS - I

Year : 2013-14 Sem: III

Name of the Faculty Subject Branch

: Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering Date: 22/02/13 Time:

This Tutorial corresponds to Unit Nos. II Q1. Analyse the synchronous circuit of Fig. 1 (the clock is not shown, but is implicit) (a) Write down the excitation and output functions. (b) Form the excitation and state tables. (c) Give a word description of the circuit operation.

Fig 1 Q2. (a) Find the equivalence partition for the machine shown in Table 1. (b) Show the standard form of the corresponding reduced machine. (c) Find a minimum-length sequence that distinguishes state A from state B.

Table 1

Signature of the Director of the Institution Date:

Signature of Faculty Date:

TUTORIAL SHEETS II

Year : 2013-14 Sem: III

Name of the Faculty Subject Branch

: Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering Date: 26/04/13 Time:

This Tutorial corresponds to Unit Nos. III Q1

Analyze the circuit in Fig. 2 for SIC static hazards. Redesign it to make it SIC hazard-free.

Fig 2

Q2

(a) Find all the races in the flow table of Table 2 and indicate those that are critical and those that are not. (b) Find another assignment that contains no critical races.

Table 2

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TUTORIAL SHEETS III

Year : 2013-14 Sem: III

Name of the Faculty Subject Branch

: Mr RAHUL NIGAM : NETWORK ANALYSIS Subject Code: EC - 305

: Electronics and Comm. Engineering Date: 17/04/13 Time:

This Tutorial corresponds to Unit Nos. I & V

Q1. In the circuit in Fig. 3, suppose that we want to obtain a test vector for the c1 s-a-0 fault. (a) Show that one-dimensional path sensitization through gates G5 and G8 or G6 and G8 does not yield such a test vector. (b) Obtain a test vector by sensitizing both the above paths simultaneously.

Fig 3 Q2 Explain following VLSI structure design principal Q.3 Q.4 Hierarchy Regularity Modularity Locality

Explain CPLD and PLD in detail. Describe a 1-bit full adder using an ASM chart.

Signature of the Director of the Institution Date:

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JAWAHARLAL INSTITUTE OF TECHNOLOGY BORAWAN (KHARGONE) MID TERM I EXAMINATION -2013 Subject: VCS ( EC - 605) Year/ Semester: III/III Max. Marks : 20 Branch :EC No. of copies: 90 Time : 2 Hours

Attempt any four questions. All question carry equal marks. Q.1 Explain following VLSI structure design principal Q.2 Q.3 Q.4 Hierarchy Regularity Modularity Locality

Write brief description of FPGA or CAD tools and their key features. what are Pass transistors. Built master-slave D flip flop with the help of pass transistors and explain it briefly. Find Minimal machine of the following machine state table P.S. I1 A B C D E F -,E,0 F,0 -,-,C,0 I2 C,1 -,F,1 -,F,0 -,N.S., Z I3 E,1 -,-,B,1 A,0 B,0 I4 B,1 -,-,-,D,1 C,1

Q.5

A synchronous sequential circuit has two JK flip flops A and B, two inputs x and y and one output z. obtain (I) logic diagram, (II) state table and (III) state diagram if input and output equations are JA = BX+BY JB = AX Z = AXY+BXY KA = BXY KB = A+XY

Signature of the Director of the Institution Date:

Signature of Faculty Date:

JAWAHARLAL INSTITUTE OF TECHNOLOGY BORAWAN (KHARGONE) MID TERM II EXAMINATION -2013 Subject: VCS (EC - 605) Branch: EC (IIIrd year/III sem)

Max. Marks : 20 Time : 2 Hours Attempt any four questions. All question carry equal marks. Q.1 Write difference between Asynchronous sequential circuit and Synchronous sequential circuit with their Advantages & Disadvantages.

Q.2 Derive a test vector for an s-a-1 fault at line c1 in the circuit in Fig.1(Path sensitizing method)

Fig.1 Q.3 Find test vector for stuck at 1 and stuck at 0 fault at Y shown in Fig2.(path differences method)

Fig2 Q.4 Find all critical, noncritical races and cycles in following state table.

State Table Q.5 Q.6 Explain PROM, PLA and PAL in detail. Explain CPLD and PLD in detail.
Signature of Faculty Date:

Signature of the Director of the Institution Date: