IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO.

1, JANUARY 2012

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A Family of Z-Source Matrix Converters

Baoming Ge, Member, IEEE, Qin Lei, Student Member, IEEE, Wei Qian, and Fang Zheng Peng, Fellow, IEEE
AbstractThis paper extends the Z-source concept to matrix converters and explores a family of Z-source matrix converters. Their principles and characteristics are analyzed, and a simplied voltage-fed Z-source matrix converter is used as an example to demonstrate its operation, voltage gain versus modulation index, PWM method, boost control, and implementation of the control. Both simulation and experimental results verify operation of the proposed Z-source matrix converter, analytical results, and control method. The Z-source converters can achieve buck and boost operation with reduced number of switches needed, therefore achieving low cost, high efciency, and reliability, compared to the traditional matrix converters. Index TermsBoost control, matrix converter (MC), voltage gain, Z-source converter.

I. I NTRODUCTION HE matrix converter (MC) is a very interesting converter circuit, with sinusoidal input/output waveforms and controllable input power factor [1][4]. It can implement the direct ac-ac power conversion with minimum passive energy storage components. Previous researches have made significant progress in control methods, theoretical analysis, and implementation issues related to the MC [1][17]. Its possible applications have been investigated [18][23]. They can be a good alternative to the existing back-to-back converters since reverse blocking insulated gate bipolar transistors (RB-IGBTs) are now available. Fig. 1 shows the conguration of a three-phase voltagesource matrix converter (VS-MC). By controlling nine ac switches with an appropriate modulation scheme, the VS-MC can produce a desired ac output voltage while achieving controlled input current waveform and power factor [1]. The VS-MC is fed by an ac voltage-source and has to be connected to an inductive load. The operating principle of the VS-MC is very similar to that of the VS inverter. To produce an active voltage to the load, one of three-phase input voltages can be selectively connected to each output terminal. To produce a zero voltage, all the load terminals have to be connected to one of the
Manuscript received December 13, 2010; revised March 2, 2011 and April 11, 2011; accepted May 23, 2011. Date of publication June 23, 2011; date of current version October 4, 2011. This work was supported in part by the Power Electronics Science and Education Development Program of Delta Environmental & Educational Foundation under Grant DREG2010001. B. Ge is with the Department of Electrical and Computer Engineering, Michigan State University, East Lansing, MI 48824 USA, and is also with the school of Electrical Engineering, Beijing Jiaotong University, Beijing 100044, China (e-mail: [email protected]). Q. Lei, W. Qian, and F. Z. Peng are with the Department of Electrical and Computer Engineering, Michigan State University, East Lansing, MI 48824 USA (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TIE.2011.2160512

Fig. 1. Voltage-source matrix converter.

Fig. 2. Current-source matrix converter.

input source terminals. Note that no shoot-through switching states are allowed to the input source side, and no open circuits allowed to the output side. Again, like the VS inverter, the VS-MC features inherent buck operation with the maximum voltage ratio of 0.866 [1]. From the topological viewpoint, the current-source matrix converter (CS-MC) in Fig. 2 can be seen as the dual circuit of the VS-MC. The CS-MC is fed from a current source, and the load has to be capacitive. With the dual relationship to the VS-MC, the CS-MC cannot have open-circuit to the input side and short-circuit to the output side. Its output voltage is always greater than the input voltage. A buck-boost matrix converter can be implemented through a combination of the VS-MC and CS-MC. Fig. 3 shows one

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Fig. 3. Buck-boost matrix converter using the traditional congurations.

combination, where a VS-MC is connected to the source side for buck operation, whereas a CS-MC connected to the load side for boost operation. Another combination is to connect a CS-MC to the source side and a VS-MC to the load side. Both combinations provide buck-boost operation, thus good for applications that have a wide input or output voltage range. However, both buck-boost matrix converters require two stages and 18 ac switches, which contribute to high cost, complicated control strategy, low efciency, and low reliability. In addition, an open-circuit or short-circuit in both converters is dangerous, and a proper commutation method has to be employed for safe switching. With the recently proposed Z-source inverter [24], many contributors have extended other power conversion circuits [25][29]. They have focused on Z-source DC/DC converters, Z-source DC/AC inverters, and Z-source AC/AC converters. However, the frequency is not changed in their Z-source AC/AC converters [27], [28]. This paper proposes a family of three-phase Z-source matrix converters (ZS-MCs), describes their operating principles, and analyzes their characteristics. Using one ZS-MC as an example, its modeling, analysis, control method, and implementation are presented. Simulation and experimental results verify the proposed ZS-MC and control method. II. FAMILY OF Z-S OURCE M ATRIX C ONVERTER C IRCUIT T OPOLOGIES AND O PERATING P RINCIPLES Fig. 4 shows the ZS-MCs, which consist of three parts: source-side MC, Z-source network, and load-side MC. Like the Z-source inverters, the ZS-MCs can be voltage-fed and current-fed types. Fig. 4(a) shows the voltage-fed ZS-MC and Fig. 4(b) for the current-fed ZS-MC. The main feature of the ZS-MCs is to fulll both buck and boost operation. That is, they can step down and up the source voltage. Each ZS-MC needs 18 ac switches, which makes it difcult for practical use. However, it provides us a completion of the topology and

Fig. 4.

ZS matrix converters. (a) Voltage-fed ZS-MC. (b) Current-fed ZS-MC.

Fig. 5.

Simplied voltage-fed ZS matrix converter.

helps us deduce some useful ZS-MCs. For example, Fig. 5 shows a simplied voltage-fed ZS-MC, where the source-side MC in Fig. 4(a) is replaced by a three-phase ac switch S0 . When the three-phase switch S0 is kept on, the simplied voltage-fed ZS-MC is operated in the same manner as the traditional VS-MC in Fig. 1 to produce active voltages and zero voltage to the load, which is the buck mode. When the voltage boost is needed, the shoot-through state is inserted in the PWM pulses of MC, and the three-phase switch S0 is turned off during shoot-through states. By shooting-through the MC during the zero-voltage switching states, the voltage is boosted with no introduction of distortion to the original intended output voltage waveform. The longer are the shoot-through intervals, the greater the output voltage will be boosted. Also, it obviously reduces switch count, compared with the combination shown in Fig. 3.

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Fig. 6.

Simplied current-fed ZS matrix converter.

Fig. 8. Trans-ZS-MCs. (a) Voltage-fed trans-ZS-MC. (b) Current-fed transZS-MC.

features about the qZS-MCs are that the innite voltage gain can be achieved and that the Z-source networks are minimized in terms of voltage and current ratings. Fig. 8 shows two trans-ZS matrix converters. As trans-ZS inverters [29], the trans-ZS converters can have higher voltage boost while reducing voltage stress. The trans-ZS matrix converters can be controlled in an exactly the same manner as the simplied ZS-MCs. They are suited for the applications where high voltage boost is required. III. O PERATION AND M ODELING OF THE S IMPLIFIED VOLTAGE -F ED ZS-MC
Fig. 7. qZS-MCs. (a) Voltage-fed qZS-MC. (b) Current-fed qZS-MC.

Fig. 6 shows a simplied current-fed ZS-MC, in which the source-side MC of Fig. 4(b) is replaced by a threephase switch. The simplied current-fed ZS-MC is the dual circuit of the simplied voltage-fed ZS-MC. Similarly, the simplied current-fed ZS-MC can step up and down the voltage. Fig. 7 shows the voltage-fed and current-fed quasi-Z-source matrix converters (qZS-MCs), like qZS inverters [25]. Their operations are similar to that of the simplied ZS-MCs. Good

The simplied voltage-fed ZS-MC shown in Fig. 5 is used to describe ZS-MCs operation principle and to verify their buck-boost function in the following sections. To analyze the operation principle, the ZS-MCs can be divided into two switching states: shoot-through and non-shoot-through states. Fig. 9 shows the equivalent circuits during these states for the simplied voltage-fed ZS-MC. A. Basic Model For one switching cycle, Tc , assuming the interval of shootthrough state is T0 , and the total interval of non-shoot-through

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drop and assuming the switching frequency is far greater than the fundamental frequency. From (1) and (3), one has DvC 1 + (1 D)(vC 3 vca ) = 0 DvC 2 + (1 D)(vC 1 vab ) = 0 DvC 3 + (1 D)(vC 2 vbc ) = 0 From (2) and (3), one has vC 1 = (1 D)va b vC 2 = (1 D)vb c vC 3 = (1 D)vc a . (5) (4)

Assume that the source is a three-phase symmetric system by vab sin t vbc = Vi sin(t 120 ) (6) vca sin(t + 120 ) where Vi and are the voltage amplitude and angular frequency of the source. Assume the voltages across the capacitors have a phase difference C in reference to the source, i.e., sin(t + C ) vC 1 vC 2 = VC sin(t + C 120 ) (7) vC 3 sin(t + C + 120 ) where VC is the amplitude of capacitor voltages. Assume the voltages across the MC bridge have a phase difference m referred to the source, thus, sin(t + m ) va b vb c = V m (8) sin(t + m 120 ) vc a sin(t + m + 120 ) where Vm is the output voltage amplitude of Z-source network. From (4), (6), and (7), we have D sin(t + C )+(1 D) sin(t + C +120 ) D sin(t + C 120 )+(1 D) sin(t + C ) VC D sin(t + C +120 )+(1 D) sin(t + C 120 ) sin(t + 120 ) sin t = (1 D)Vi . (9) sin(t 120 ) Applying trigonometric functions, such as sin2 t + sin2 (t 120 ) + sin2 (t + 120 ) = 1.5, to (9), the relationship between the capacitor and source voltage amplitudes can be derived as 1D VC = Vi 3D2 3D + 1 (10)

Fig. 9. Equivalent circuit of the simplied voltage-fed ZS matrix converter. (a) Non-shoot-through state. (b) Shoot-through state.

states is T1 , thus, Tc = T0 + T1 and the shoot-through duty ratio, D = T0 /Tc . From Fig. 9(a), during the interval of non-shoot-through states, T1 , one has the following voltage equations: vab vC 1 vL2 vbc = vC 2 vL3 (1) vca vC 3 vL1 va b vC 1 vL1 vb c = vC 2 vL2 (2) vc a vC 3 vL3 where vL1 , vL2 , and vL3 are the voltages across the inductors L1 , L2 , and L3 , respectively; vC1 , vC2 , and vC3 are the voltages across the capacitors C1 , C2 , and C3 , respectively; vab , vbc , and vca are the line-line voltages of the source and va b , vb c , and vc a are the line-line voltages across the MC bridge. From Fig. 9(b), one can get vL1 vC 1 vC 2 = vL2 . vC 3 vL3

(3)

In steady state, the average voltage of the inductors over one switching cycle will be zero, neglecting fundamental voltage

Similarly, from (5), (7), and (8), the relationship between VC and Vm can be written as VC = (1 D)Vm . (11)

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From (10) and (11), the amplitude of line-line voltage across the MC input side is Vm = 3D2 1 Vi = BVi . 3D + 1 (12)

It can be found that the maximum value of boost factor B reaches two at D = 0.5, which means that twice voltage amplitude is obtainable in comparison with the source voltage. B. Buck/Boost Conversion Mode If the simplied voltage-fed ZS-MC operates with only the non-shoot-through states, as shown in Fig. 9(a), then, we have Vm = Vi , and the ZS converter acts as a traditional MC. Its output phase voltage peak value is Vi vln = M 3 (13)
Fig. 10. PWM method for the matrix converter.

where M is the modulation index of output voltages. vln is always less than the input phase voltage Vi / 3, and this is the buck operation of the simplied voltage-fed ZS-MC. When the simplied voltage-fed ZS-MC operates in the boost mode, both non-shoot-through states and shoot-through states will be used in each switching cycle. Then, the line-line voltage amplitude across the MC can be boosted by a factor of B , and its value is dependent on the shoot-through duty ratio D, as dened in (12). Notice that the shoot-through can only be inserted during the zero switching states, and the active switching states should not be changed to maintain the output waveform undistorted. Moreover, the shoot-through duty ratio D is related to the shoot-through methods. For example, the simple boot control will have a constant shoot-through duty ratio D, and its maximum value is limited to D (2 4M )/3; whereas the maximum boot controls D varies from switching cycle to cycle along the voltage envelope, and its average value equals 1 M . Section IV-C describes its details. The shootthrough states boost voltage and make the peak ac voltage on the output side of the MC become Vi Vm vln = M = BM. 3 3 IV. C ONTROL S TRATEGY FOR THE S IMPLIFIED VOLTAGE -F ED ZS-MC All the boost control methods that have been explored for the traditional Z-source inverter, such as simple boost, maximum boost, maximum constant boost [24], [30][32], can be applied to the simplied voltage-fed ZS-MC with a modication of the carrier envelope. A. PWM Method for Traditional MC Fig. 10 illustrates a control strategy for the MC, which is a carrier-based PWM. The carrier waveform has the same envelope with the three-phase source voltages, va , vb , and vc . The top envelope consists of the maximum voltage among three input phase voltages, and the bottom envelope consists of the (14)

Fig. 11. PWM control for the simplied voltage-fed ZS matrix converter.

minimum voltage among them. During each switching period, the triangular carrier is compared with the output voltage references vA , vB , and vC . As an example, the phase-A output voltage reference vA is shown in Fig. 10, which is compared with the triangular carrier to produce PWM signal for phase-A. As a result, its PWM voltage waveform is generated on the output side of the MC. B. PWM Method for the Simplied Voltage-Fed ZS-MC The same PWM control can be used for the simplied voltage-fed ZS-MC when inserting shoot-through states to Fig. 10. When a constant shoot-through duty ratio is used, Fig. 11 presents an example to illustrate the PWM control for the simplied voltage-fed ZS-MC. In Fig. 11, a simple boost control is achieved through two shoot-through references, in which both references are related to both envelopes by vst,r = (ymax ymin )n + ymax + ymin 2 (15)

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Fig. 13. Fig. 12. Simple boost method.

Maximum boost method.

where n will determine the shoot-through duty ratio, and its value has a limitation that the resultant minimum value of the top shoot-through reference should be less than 0.5 p.u. and larger than M . Therefore, 1 n (1 + 4M )/3 for the top shoot-through reference, and its negative value is (n) for the bottom shoot-through reference. The modulation index should be less than 0.5, given that the output references vA , vB , and vC can be any frequency with any phase angle and with no harmonic injection. ymax and ymin are the top and bottom envelopes of the source voltages, respectively. For the simple boost control, the shoot-through interval from the top reference can be calculated as T0 = 1n Tc 2 1n . 2 (16)

is zero. Therefore, the shoot-through state has no effect on the output voltage waveform itself. The maximum boost control method for the traditional Z-source inverter [30] can be applied to the simplied voltagefed ZS-MC, as shown in Fig. 13. This control method maintains other active states unchanged and turns all zero states into shoot-through. Thus, the maximum T0 and B are obtained for any given modulation index without distorting the output waveform. C. Voltage Gain of the Simplied Voltage-Fed ZS-MC As shown in Fig. 13, the circuit is in a shoot-through state when the triangular carrier is either greater than the maximum curve of the references vA , vB , and vC , or smaller than the minimum of the references. The shoot-through duty ratio varies each cycle. The voltage gain is related to the average shootthrough duty ratio. However, it is very complicated and lengthy to derive its general equation [30]. Due to page limit, we give a special case to show its voltage gain. For simplicity, assume that the modulation signals have the same frequency and phase angle with the source voltages; thus, the shoot-through state repeats periodically every /3. Because the switching frequency is much higher than the output frequency, the shoot-through duty ratio over one switching cycle in the interval (/6, /2) can be expressed as ymax ymin M [sin t sin(t 120 )] T0 = . Tc ymax ymin (18)

and its shoot-through duty ratio in half carrier cycle is Dh = (17)

As shown in Fig. 11, the output voltage references vA , vB , and vC are compared with the carrier waveform to produce their PWM voltages the same way in Fig. 10. The shootthrough references are used to insert the shoot-through duty ratio in the nal output PWM signals. The detail is shown in Fig. 12 to illustrate the produced shoot-through pulses, with the interval of T0 that is determined by comparing the shootthrough references with the carrier waveform. The PWM_A, PWM_B, and PWM_C are derived from the comparison of the output voltage references with the carrier waveform in Fig. 12, respectively. We can nd that the shoot-through occurs during intervals when three-phase voltages on the output side have the same voltage, such as va of the top envelope, or vc of the bottom envelope in Fig. 12, which means that three output terminals of the MC are connected to the phase-a or phase-c of the source side during this period, and the resultant line-line output voltage

The average duty ratio of shoot-through can be calculated by integrating (18) over /3, which yields T0 = 1 M. Tc From (12), its boost factor is obtained by B= 1 . 3M 2 3M + 1 (20) (19)

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With this case, the maximum boost control will provide voltage gain by G = BM = M . 3M + 1 (21)

3M 2

For the simple boost control, (17) and n (1 + 4M )/3 are used to get its maximum shoot-through duty ratio in each carrier cycle by D 2 4M . 3 (22)

Based on (12) and (22), the voltage gain for the simple boost control method is calculated as 3M (23) G = BM = 2 16M 4M + 1 Similarly, other ZS-MCs can be analyzed, and their voltage gains can be derived. As another example, the voltage-fed qZS-MC is deduced to compare its voltage gain with the simplied voltage-fed ZS-MC. From Fig. 7(a), during the interval of the shoot-through states, T0 , the voltage-fed qZS-MC has equivalent circuit as shown in Fig. 14(a), and has vab vCa1 vLa2 vLb1 vCb2 vbc = vCb1 + vLb2 vLc1 vCc2 (24) vca vCc1 vLc2 vLa1 vCa2 vLa2 vLa1 vCa2 vCa1 vCb1 + vLb2 = vLb1 + vCb2 (25) vCc1 vLc2 vLc1 vCc2 where v denotes the voltage, and the subscript Cx1 and Cx2 are the capacitors 1 and 2 of phase-x; Lx1 and Lx2 for the inductors 1 and 2 of phase-x; x = a, b, c. During the interval of the non-shoot-through states, T1 , its equivalent circuit is shown in Fig. 14(b), and one can get vab vCa1 vCa2 va b vbc = vCb1 + vCb2 + vb c vca vCc1 vCc2 vc a vCb1 vCb2 vCc1 vCc2 (26) vCa1 vCa2 vLa1 vCa2 vLa2 vCa1 vCb1 = vLb1 , vCb2 = vLb2 . (27) vCc1 vLc1 vCc2 vLc2 Due to the symmetry of quasi-Z network, there are vLa2 vLa1 vCa1 vCa2 vLb2 = vLb1 , vCb1 = vCb2 . vLc2 vLc1 vCc1 vCc2

Fig. 14. Equivalent circuit of the voltage-fed qZS matrix converter. (a) Shootthrough state. (b) Non-shoot-through state.

derived from (24), (27), and (28) vab vCa1 vCb1 D vCc1 vCb1 = vbc . 1 2D vCa1 vCc1 vca

(29)

Due to the symmetric voltages of three-phase capacitors, (29) becomes vab vca vCa1 D vbc vab . vCb1 = (30) 6D 3 vCc1 vca vbc Combining (26) and (28) into (30), there is va b vab 1 vb c = vbc . 1 2D vc a vca

(31)

(28)

From (6), (8), and (31), similar to the process used for the simplied voltage-fed ZS-MC, the boost factor of the voltagefed qZS-MC can be expressed as B= Vm 1 . = Vi 1 2D (32)

In steady state, the average voltage of the inductors over one switching cycle should be zero, and (29) as follows can be

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Fig. 15. Comparison of voltage gains: traces 1 and 2 for the voltage-fed qZS-MC, traces 3 and 4 for the simplied voltage-fed ZS-MC, trace-5 for the traditional MC, where traces 1 and 3 are from the simple boost control, traces 2 and 4 from the maximum boost control.

Fig. 16.

Calculation of duty cycle.

From (6), (7), and (30), the capacitor voltage amplitude is D Vi . VC = 1 2D (33)

V. I MPLEMENTATION OF C ONTROL M ETHOD The proposed PWM control for the simplied voltage-fed ZS-MC can be implemented in a simple way when a digital signal processor (DSP) and a complex programmable logic device (CPLD) are employed. Fig. 16 is used as a general case to calculate the PWM duty cycle, where Tc is the period of the carrier, t1 and t2 are two adjacent time instants corresponding to the maximum and minimum values of the carrier wave, respectively. Then, the duty cycle ton is calculated as ton1 = ton2 ton M sin t1 M N Tc M X1 M N 2 M sin t2 M N Tc = M X2 M N 2 = ton1 + ton2 (36) (37) (38)

For different boost controls, different voltage gains of the voltage-fed qZS-MC are obtained as follows. 1) For the maximum boost control, (19) is applicable, and the voltage gain is G = BM = M . 2M 1 (34)

2) For the simple boost control, (22) is applicable, and the voltage gain is 3M G = BM = . 8M 1 (35)

Fig. 15 shows the traces 14 of voltage gain versus modulation index for the simplied voltage-fed ZS-MC and qZS-MC, each with the maximum boost and simple boost controls, respectively. Trace 5 shows the voltage gain of the traditional MC. Both ZS-MCs present great higher gain than the traditional MC. The maximum boost control makes the ZS-MCs shoot through during the entire zero state intervals, so it has the maximum voltage gain [30]. For the simplied voltage-fed ZS-MC, the maximum voltage boost reaches 1.155 at M = 0.667, and the voltage gain reaches one when M = 0.5. A circle in Fig. 15 shows its experimental value of 0.992 obtained from the simplied voltage-fed ZS-MC, which matches well with the theoretical curve 4 with the maximum boost control. The simple boost control has a lower voltage gain for the simplied voltage-fed ZS-MC, due to low modulation index limitation (M 0.5). An experimental result with G = 0.43 from the traditional MC is plotted as a star in Fig. 15 for comparison to that of the simplied voltage-fed ZS-MC, both at the same modulation index of 0.5. It should be noted that the voltage-fed qZS-MC has much higher voltage gains than those of the simplied voltage-fed ZS-MC. Third harmonic injection can be used to increase the range of M , which is helpful to improve voltage gain for both simple and maximum boost control methods.

where M X1 and M X2 are the voltage values of top voltage envelope at instants t1 and t3 , respectively; M N is the voltage value of bottom voltage envelope at instant t2 . Equations (36)(38) can be applied to all three phases to produce three PWM pulse sequences SA , SB , SC , which should be distributed to nine ac switches in order to generate the expected PWM pulses. For this purpose, six additional logical signals are used in Fig. 17, where Sz1 , Sx1 , and Sy1 denote the indicators for their respective phase-c, phase-a, and phase-b of the top voltage envelope. For example, Sz1 = 1 when phase-c voltage is the largest value among the three phase voltages. Sy2 , Sz2 , and Sx2 denote the indicators for their respective phase-b, phase-c, and phase-a of the bottom voltage envelope. For example, Sy2 = 1 when phase-b has the minimum voltage among the three phase voltages. These six voltage-envelope indicators are combined with the three PWM pulse sequences to generate nine switching signals according to the following logics: SAa SAc SBb SCa SCc = Sx1 SA + Sx2 S A SAb = Sy1 SA + Sy2 S A = Sz1 SA + Sz2 S A SBa = Sx1 SB + Sx2 S B = Sy1 SB + Sy2 S B SBc = Sz1 SB + Sz2 S B = Sx1 SC + Sx2 S C SCb = Sy1 SC + Sy2 S C = Sz 1 SC + Sz 2 S C

where the symbol + denotes the logic OR.

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Fig. 17. Indicators of the voltage envelopes.

The above logical functions can be used to drive the traditional voltage-fed MC. However, the shoot-through states should be inserted before they are sent out to drive the simplied voltage-fed ZS-MC. When the maximum boost control is used, the nal gate drive signals can be expressed as Sst_1 = SAa SBa SCa Sst_3 = SAc SBc SCc SAa = SAa Sst SBa = SBa Sst SCa = SCa Sst Sst_2 = SAb SBb SCb Sst = Sst_1 + Sst_2 + Sst_3 SAc = SAc Sst SBc = SBc Sst SCc = SCc Sst

SAb = SAb Sst SBb = SBb Sst SCb = SCb Sst

where the symbol + denotes the logic OR. All the logical functions will be fullled in the CPLD. VI. S IMULATION AND E XPERIMENTAL R ESULTS A prototype of the simplied voltage-fed ZS-MC has been built in the laboratory. Simulations and experiments have been carried out to verify the concept and theoretical analysis. In the experiment, the simplied voltage-fed ZS-MC was fed from the grid and a R-L load was connected to the output of the ZS-MC. System parameters for both simulations and experiments are as follows: the Z-source network with Lz = 1 mH, Cz = 330 F, the R-L load with R = 20 , L = 6.3 mH, and the grid source frequency is 60 Hz. In order to demonstrate the operation of the simplied voltage-fed ZS-MC and to verify the control method, three cases have been investigated: 1) buck mode without shootthrough; 2) boost mode; 3) transition from buck mode to boost mode. Case 1Buck Mode Without Shoot-Through: The simplied voltage-fed ZS-MC works in the buck conversion mode when no shoot-through is inserted, operating just like the traditional MC. Fig. 18(a) and (b) show the simulation and experimental waveforms for the buck operation: shoot-through duty ratio D = 0, boost factor B = 1, and G = BM = 0.5. The measured voltage gain of 0.43 is consistent with the theoretical
Fig. 18. Buck operation of the simplied voltage-fed ZS matrix converter: from top to bottom, input source line-line voltage, the output line-line voltage and output current of the MC, and the input phase current to the MC, respectively. (a) Simulation results. (b) Experimental results.

value of 0.5, considering voltage drops across the line impedance and MC switches. Fig. 19 shows the PWM duty cycles calculated by (36)(38), output three-phase currents, and output phase voltage. The output three-phase currents are perfectly sinusoidal, which verify the proposed (36)(38) and logical functions. Case 2Boost Mode With Shoot-Through: Fig. 20(a) and (b) show the simulation and experimental results, in which M = 0.5 and the maximum boost control was employed to boost voltage. From (21) and Fig. 15, the boost factor B should be 2.0 and the voltage gain should be one, i.e., G = M B = 1.0. The measured voltage gain from the experiment was 0.992, which agreed well with the theoretical value. In the simulation, the source harmonics and line impedance were included to mimic the real source power from the grid. Both simulation and experiment agreed well with each other.

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Fig. 19. PWM duty cycles, output currents, and phase voltage of the MC.

Fig. 21. Transition from the buck mode to the maximum boost control: from bottom to top, the input phase current to the MC, the output current and lineline voltage of the MC, the input source line-line voltage, and the grid current in simulation results. (a) Simulation results. (b) Experimental results.

Fig. 20. Boost operation of the simplied voltage-fed ZS matrix converter: from top to bottom, the input source line-line voltage, the output line-line voltage and output current of the MC, and the input phase current to the MC, respectively. (a) Simulation results. (b) Experimental results.

It can be seen that the output current in Fig. 20 exhibits some ripples, due to the changing shoot-through duty ratio D of the maximum boost control. Namely, this changing D causes a non-pure sinusoidal instantaneous line-line voltage to the matrix converter, so the output current ripple is produced. The quality of the output current can be improved, and a sinusoidal waveform will be obtained when the simple boost control in Fig. 11 is employed, because it has a constant shoot-through duty ratio D. Case 3Transition From Buck Mode to Boost Mode: This case shows the transition process from the buck to boost mode. At the beginning, the simplied voltage-fed ZS- MC operates in the buck mode, the shoot-through states were suddenly added in the PWM pulses. Fig. 21 shows this transition. It can be seen that both output voltage and load current suddenly increased after the shoot-through with the maximum boost control was introduced. The voltage gain increased from 0.43 to 0.992. The well-agreed simulation and experimental results conrm the operation of the simplied voltage-fed ZS-MC.

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The maximum boost control causes not only the output voltage/current harmonics, but also the grid currents harmonics, as shown in Fig. 21(a). The quality of line-line voltage to the Z-source network degrades if the grid impedance is high. Thus, the maximum boost control should be employed only when a maximum boost is needed and the harmonics are not of the top concerns. For applications with high harmonic concerns, the simple boost control should be employed for high quality voltage and current waveforms. The Z-network capacitance introduces leading grid current, which is more evident at light load conditions. VII. C ONCLUSION The MCs have become more attractive since RB-IGBTs are now available. The traditional voltage-fed MC can only produce an ac voltage that is well limited below the input source voltage, and the current-fed MC can only produce an output voltage that is greater than the source voltage. This paper proposed a family of ZS-MCs that can produce any output voltage as so desired. Their basic topologies and operating principle have been introduced. A simplied voltage-fed ZS-MC was used as an example to illustrate its detail operation, analysis, PWM method, boost control, and its implementation. A prototype using RB-IGBTs was built in the laboratory to verify the proposed ZS-MCs operating principle, and control methods. Both simulation and experimental results validate its voltage buck and boost operation. With only three additional switches, the ZS-MCs can have the buck-boost function, which can reduce cost and increase reliability for those applications that have a requirement for wide input and output voltage ranges. R EFERENCES
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012

Baoming Ge (M11) received the Ph.D. degree in electrical engineering from Zhejiang University, Hangzhou, China, in 2000. He was a Postdoctoral Researcher in the Department of Electrical Engineering, Tsinghua University, Beijing, China, from 2000 to 2002, was a Visiting Scholar in the Department of Electrical and Computer Engineering, University of Coimbra, Coimbra, Portugal, from 2004 to 2005, and was a Visiting Professor in the Department of Electrical and Computer Engineering, Michigan State University, East Lansing, from 2007 to 2008. Currently, he is working with the Department of Electrical and Computer Engineering, Michigan State University; he also is a Professor with the School of Electrical Engineering, Beijing Jiaotong University, Beijing, where he joined in 2002. His research interests include permanent magnet synchronous, switched reluctance and induction motors, real-time control of electrical machines, power electronics systems, nonlinear control theories and applications to electric drives.

Qin Lei (S09) was born in Wuhan, China, in 1985. She received the B.S. degree in electrical engineering from Huazhong University of Science and Technology, Wuhan, China, in 2006, and is currently working toward the Ph.D. degree at Michigan State University, East Lansing. Her research interests include Z-source inverter, current source inverter, matrix converter, microgrid, and hybrid electrical vehicle motor drives.

Wei Qian received the B.S and M.S. degrees in electrical engineering at Wuhan University, Wuhan, China, in 2003 and 2006, respectively, and is currently working toward the Ph.D. degree in the Power Electronics and Motor Drive Lab at Michigan State University, East Lansing. Her research interest involves dc-dc converters, dc-ac inverters, and the applications in hybrid electric vehicles and renewable energy conversion systems.

Fang Zheng Peng (M92SM96F05) received the B.S. degree in electrical engineering from Wuhan University, Wuhan, China, in 1983, and the M.S. and Ph.D. degrees in electrical engineering from Nagaoka University of Technology, Nagaoka, Japan, in 1987 and 1990, respectively. From 1990 to 1992, he was with Toyo Electric Manufacturing Company, Ltd., Tokyo, Japan, as a Research Scientist and was engaged in research and development of active power lters, exible ac transmission systems (FACTS) applications, and motor drives. From 1992 to 1994, he was with Tokyo Institute of Technology as a Research Assistant Professor and initiated a multilevel inverter program for FACTS applications and a speed-sensorless vector-control project. From 1994 to 2000, he was with Oak Ridge National Laboratory (ORNL), Oak Ridge, TN, as a Research Assistant Professor. From 1994 to 1997, he was with the University of Tennessee, Knoxville, as a Staff Member, and from 1997 to 2000, he was the Lead (Principal) Scientist with the Power Electronics and Electric Machinery Research Center at ORNL. Since 2000, he has been with the Michigan State University, East Lansing, as an Associate Professor and is currently a Full Professor of the Department of Electrical and Computer Engineering. He is the holder of over ten patents, and two of them have been used extensively in industry. Dr. Peng is the recipient of many awards including the 1996 First Prize Paper Award and the 1995 Second Prize Paper Award of Industrial Power Converter Committee in IEEE/IAS Annual Meeting, the 1996 Advanced Technology Award of the Inventors Clubs of America, Inc., the International Hall of Fame, the 1991 First Prize Paper Award in IEEE T RANSACTIONS ON I NDUSTRY A PPLICATIONS, and the 1990 Best Paper Award in the transactions of the IEE of Japan, the Promotion Award of Electrical Academy. He has served the IEEE Power Electronics Society in many capacities such as Chair of Technical Committee for Rectiers and Inverters, an Associate Editor for the IEEE T RANSACTIONS ON P OWER E LECTRONICS, Region 16 Liaison, Memberat-Large, etc.