SN74LS132 Quad 2-Input Schmitt Trigger NAND Gate: LOW Power Schottky

SN74LS132 Quad 2-Input Schmitt Trigger NAND Gate
The SN74LS132 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Additionally, they have greater noise margin than conventional NAND Gates. Each circuit contains a 2-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem pole output. The Schmitt trigger uses positive feedback to effectively speed-up slow input transitions, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds (typically 800 mV) is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations. As long as one input remains at a more positive voltage than VT+ (MAX), the gate will respond to the transitions of the other input as shown in Figure 1.
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LOW POWER SCHOTTKY
14 1
LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW)

VCC 14 13 12 11 10 9 8
PLASTIC N SUFFIX CASE 646
14 1
7 GND
SOIC D SUFFIX CASE 751A
GUARANTEED OPERATING RANGES

Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 0.4 8.0 Unit V C mA mA
ORDERING INFORMATION
Device SN74LS132N SN74LS132D Package 14 Pin DIP 14 Pin Shipping 2000 Units/Box 2500/Tape & Reel
Semiconductor Components Industries, LLC, 1999
December, 1999 Rev. 6
Publication Order Number: SN74LS132/D
SN74LS132
5 VO, OUTPUT VOLTAGE (VOLTS) 4
VCC = 5 V TA = 25C
0.4
0.95 1.2 VIN, INPUT VOLTAGE (VOLTS)
1.8
Figure 1. VIN versus VOUT Transfer Function
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits Symbol VT+ VT VT + VT VIK VOH VOL O IT+ IT IIH IIL IOS ICC Parameter Positive-Going Threshold Voltage Negative-Going Threshold Voltage Hysteresis Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage 0.35 Input Current at Positive-Going Threshold Input Current at Negative-Going Threshold Input HIGH Current 0.1 Input LOW Current Output Short Circuit Current Power Supply Current Total, Output HIGH Total, Output LOW
(1)
Min 1.5 0.6 0.4
Typ
Max 2.0 1.1
Unit V V V
Test Conditions VCC = 5.0 V VCC = 5.0 V VCC = 5.0 V VCC = MIN, IIN = 18 mA VCC = MIN, IOH = 400 A, VIN = VIL VCC = MIN, IOL = 4.0 mA, VIN = 2.0 V VCC = MIN, IOL = 8.0 mA, VIN = 2.0 V VCC = 5.0 V, VIN = VT+ VCC = 5.0 V, VIN = VT VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX, VOUT = 0 V VCC = MAX, VIN = 0 V VCC = MAX, VIN = 4.5 V
0.8 0.65 1.5
V V
2.7
3.4 0.25 0.4 0.5
V V mA mA
0.14 0.18 20
A mA mA mA mA mA
0.4 20 5.9 8.2 100 11 14
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25C)

Limits Symbol tPLH tPHL Parameter Turn-Off Delay, Input to Output Turn-On Delay, Input to Output Min Typ Max 22 22 Unit ns ns Test Conditions VCC = 5.0 V CL = 15 pF
2
SN74LS132
3V VIN 0V tPHL tPLH 1.6 V 0.8 V
VOUT
1.3 V
1.3 V
Figure 2. AC Waveforms
V T, THRESHOLD VOLTAGE (VOLTS) V T, HYSTERESIS (VOLTS)
TA = 25C VT+
1.6
1.2 VT 0.8 VT
0.4
4.5
4.75 5 5.25 VCC, POWER SUPPLY VOLTAGE (VOLTS)
5.5
Figure 3. Threshold Voltage and Hysteresis versus Power Supply Voltage
V T, THRESHOLD VOLTAGE (VOLTS) V T, HYSTERESIS (VOLTS)
1.9 1.7 1.5 1.3 1.1 0.9 0.7 55 VT VT 0 25 75 TA, AMBIENT TEMPERATURE (C) VT+
125
Figure 4. Threshold Voltage and Hysteresis versus Temperature
3
SN74LS132
PACKAGE DIMENSIONS
N SUFFIX PLASTIC PACKAGE CASE 64606 ISSUE M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 10_ 0.38 1.01
14
B
1 7
A F N T
SEATING PLANE
L C
K H G D 14 PL 0.13 (0.005)
M
J M
DIM A B C D F G H J K L M N
A
14 8
D SUFFIX PLASTIC SOIC PACKAGE CASE 751A03 ISSUE F
B
1 7
P 7 PL 0.25 (0.010)
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
G C
R X 45 _
T
SEATING PLANE
D 14 PL 0.25 (0.010)
K
M
M
S
T B
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION

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4
SN74LS132/D

SN74LS132 Quad 2-Input Schmitt Trigger NAND Gate: LOW Power Schottky

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SN74LS132 Quad 2-Input Schmitt Trigger NAND Gate

LOW POWER SCHOTTKY

LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW)

PLASTIC N SUFFIX CASE 646

SOIC D SUFFIX CASE 751A

GUARANTEED OPERATING RANGES

Semiconductor Components Industries, LLC, 1999

December, 1999 Rev. 6

Publication Order Number: SN74LS132/D

0.95 1.2 VIN, INPUT VOLTAGE (VOLTS)

Figure 1. VIN versus VOUT Transfer Function

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Min 1.5 0.6 0.4

Max 2.0 1.1

0.8 0.65 1.5

3.4 0.25 0.4 0.5

0.4 20 5.9 8.2 100 11 14

AC CHARACTERISTICS (TA = 25C)

V T, THRESHOLD VOLTAGE (VOLTS) V T, HYSTERESIS (VOLTS)

4.75 5 5.25 VCC, POWER SUPPLY VOLTAGE (VOLTS)

Figure 3. Threshold Voltage and Hysteresis versus Power Supply Voltage

V T, THRESHOLD VOLTAGE (VOLTS) V T, HYSTERESIS (VOLTS)

Figure 4. Threshold Voltage and Hysteresis versus Temperature

D SUFFIX PLASTIC SOIC PACKAGE CASE 751A03 ISSUE F

PUBLICATION ORDERING INFORMATION

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