Regulations - 2009 First Semester
Regulations - 2009 First Semester
. Applied Electronics AP9217 ELECTRONICS DESIGN LABORATORY- I Time: 3 Hours Maximum Marks: 100
Write a program to display the word DESIGN on an LCD interfaced with PIC (60) microcontroller (40)
ii Design a Verilog module for T Flip-flop and simulate the output using Xilinx
Write a program to display the word HELLO on seven segment displays using (60) PIC Microcontroller.
ii Design a VHDL module for 2- bit asynchronous counter and simulate the output (40) using Xilinx.
Write a program to toggle an LED using PIC microcontroller with a delay of 1 sec (50) in between on and off. (50)
ii Design a 2 input OR using CMOS and simulate the design using SPICE.
Write a program to design an adaptive filter and implement the design on DSP (50) processor.
ii Design a VHDL module for 4-bit Right Shift Register and simulate the output using (50) Xilinx.
Write a program to compute periodogram for white noise and implement the design (60) on DSP processor. (40)
ii Design a 2 input NAND using NMOS and simulate the design using SPICE.
Write a program to design a multirate system and implement the design on DSP (60) processor. (40)
ii Design an inverter using NMOS and simulate the design using SPICE.
Write a matlab program for Quadrature Mirror Filter and simulate the output.
(60)
ii Design a VHDL module for 4-bit Left Shift Register and simulate the output using (40) Xilinx.
Design a Verilog module for D Flip-flop and simulate the output using Xilinx.
(50) (50)
ii Design an inverter using CMOS and simulate the design using SPICE.
Design a Verilog module for 4-bit counter and simulate the output using Xilinx.
(60)
ii Write a program to run the stepper motor in clockwise direction using 16-bit (40) microprocessor
10 i
Design a Verilog module for Serial Adder and simulate the output using Xilinx.
(60) (40)
ii Design an inverter using NMOS and simulate the design using SPICE.
11 i
Design a VHDL module for 8-bit Shift Register and simulate the output using (50) Xilinx. (50)
12 i
Design a VHDL module for 3- bit ripple counter and simulate the output using (40) Xilinx.
13 i
Design a VHDL module for 8-bit ALU. Create User Constraint file for FPGA and (60) implement ALU function on FPGA. (40)
ii Design an AND gate using NMOS and simulate the design using SPICE.
14 i
Design a Verilog module for 16-bit ALU. Create User Constraint file for FPGA and (60) implement ALU function on FPGA.
ii Design a NOT gate using Enhancement mode NMOS and simulate the design using (40) SPICE.
15 i
Design a 2 input NOR gate using NMOS and simulate the design using SPICE
(40)
ii Write a program to run the stepper motor in anticlockwise direction using 16-bit (60) microprocessor.
16 i
(60) (40)
ii Design a Verilog module for JK Flip-flop and simulate the output using Xilinx.
17 i
Design a 2 input NAND using CMOS and simulate the design using SPICE.
(40) (60)
ii Design a Verilog module for SR Flip-flop and simulate the output using Xilinx.
18 i
Design an inverter using CMOS and simulate the design using SPICE.
(40) (40)
19 i
Design a 2 input NOR gate using CMOS and simulate the design using SPICE.
(40)
ii Write a program to display the word INDIA on an LCD interfaced with PIC (60) microcontroller.
20 i
Design a 2 input NAND using NMOS and simulate the design using SPICE.
(40)
ii Design a VHDL module for 4-bit Up/Down counters and simulate the output using (60) Xilinx.
21 i
Write a program to convert an Analog voltage into Digital voltage using 16-bit (60) microprocessor.
ii Write a Verilog module for Serial in Serial out Shift Register and simulate the (40) design using Xilinx.