LCD Module
LCD Module
SPECIFICATION
Products Name: APAX T1702
43.2CM(17.0 INCH) SXGA(1280*1024)
COLOR TFT LCD MODULE
12V
Q Preliminary SpeciIication
This technical speciIication is tentative and it will be changed without notice.
______j__
,_7639_4_
Tel:02-87912868 Eax:02-87912869
Version.2.0
w
w
w
.
D
a
t
a
S
h
e
e
t
4
U
.
c
o
m
w
w
w
.
D
a
t
a
S
h
e
e
t
4
U
.
c
o
m
i Cont ent s
i i Record of Revi si on
1.0 Handling Precautions
2.0 General Description
2.1 Display Characteristics
2.2 Functional Block Diagram
2.3 Optical Characteristics
2.4 Pixel format image
3.0 Electrical characteristics
3.1 Absolute Maximum Ratings
3.2 Connectors
3.3 Signal Pin
3.4 Signal Description
3.5 Signal Electrical Characteristics
3.6 Interface Timing
3.6.1 Timing Characteristics
3.6.2 Timing Definition
3.7 Power Consumption
3.8 Power ON/OFF Sequence
4.0 Backlight Characteristics
4.1 Signal for Lamp connector
4.2 Parameter guide line for CCFL Inverter
5.0 Vibration, shock and drop
5.1 Vibration and shock
5.2 Drop test
6.0 Environment
6.1 Temperature and humidity
6.1.1 Operating conditions
6.1.2 Shipping conditions
6.2 Atmospheric pressure
6.3 Thermal shock
7.0 Reliability
7.1 Failure criteria
7.2 Failure rate
7.2.1 Usage
7.2.2 Components de-rating
7.3 CCFL life
7.4 ON/OFF cycle
8.0 Safety
8.1 Sharp edge requirement
8.2 Material
8.2.1 Toxicity
8.2.2 Flammability
8.3 Capacitors
8.4 Hazardous voltage
9.0 Other requirements
9.1 Smoke free design
9.2 National test lab requirement
10.0 Mechanical Characteristics
i i Record of Revi si on
Version and Date Page Old description New Description Remark
0.1. 99/11/20 All First Edition for Customer All
0.2. 99/11/27 3 ii Record of Revision Add
5 Physical size 404(W) x
322(H) x 25(D)
Physical size 398.0(W)
x328.5(H) x 25.0(D)
Spec. change
0.3 2000/2/9 4 (9) In case if a module Delete
4 (10) Notebook PC Bezel LCD monitor housing
4 This module is designed for a
display unit of personal
computer.
Delete
4
(Power consumption) 40W
(Power consumption) 30W
5
(Line2)TFT/LCD
(Line2)TFT-LCD
5
Color/ Chromaticity value
TBD added
7
CIE white value
TBD added
7
White luminance at CCFL
7.0mA (center point)
White luminance at CCFL
6.0mA (center point)
7
Luminance uniformity(Note 1)
New
10
(Signal pin 21) RxEIN3+ (Signal pin 21) RxEIN3-
18
Signal for Lamp connector
(Pin #2 lamp low voltage)
Signal for Lamp connector
(Pin #2 lamp high voltage)
18
(L63) White Luminance value :
Typ : TBD
(L63) White Luminance value :
Typ : 235
18
ICFL(CCFL current) value :
Min : 6.5
ICFL(CCFL current) value :
Min : 5.5
18
ICFL(CCFL current) value :
Typ : 7.0
ICFL(CCFL current) value :
Typ : 6.0
18
ICFL(CCFL current) value :
Max: 7.5
ICFL(CCFL current) value :
Max : 6.5
18
VCFL(CCFL Discharge Voltage
Value : Typ : 717
VCFL(CCFL Discharge Voltage
Value : Typ : 720
18
PCFL(CCFL Power
consumption) value :
Typ : 20
PCFL(CCFL Power
consumption) value :
Typ : 17.3
18
PCFL(CCFL Power
consumption) value :
Max : 20.0
New
19
5.1 Mechanical characteristics Move to 10.0 Mechanical
characteristics
19
(Line2)M2.5 screws.
Delete
19
5.2 Module thickness
Delete
19
5.3 Label
Delete
19
5.4 Vibration & shock 5.0 Vibration, shock & drop
19
5.5 Drop test height 75 cm 5.3 Drop test height 60 cm
20
6.1.2 shipping conditions :
relative humidity : 5% to 100%
6.1.2 shipping conditions :
relative humidity : 8% to 95%
24~25
10.0 Mechanical characteristics
New
1.0 Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when
handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface
Connector of the TFT-LCD module.
10) After installation of the TFT-LCD module into an enclosure (LCD monitor housing, for example), do not
twist nor bend the TFT -LCD module even momentary. At designing the enclosure, it should be taken into
consideration that no bending/twisting forces are applied to the TFT -LCD module from outside.
Otherwise the TFT -LCD module may be damaged.
2.0 General Descri pti on
This specification applies to the 17.0 inch Color TFT-LCD Module .
The display supports the SXGA (1280(H) x 1024(V)) screen format and 16.7M colors (RGB 8-bits data).
All input signals are 2 Channel LVDS interface compatible.
This module does not contain an inverter card for backlight.
2.1 Di spl ay Characteri sti cs
The following items are characteristics summary on the table under 25 condition:
ITEMS Unit SPECIFICATIONS
Screen Diagonal [mm] 432(17.0")
Active Area [mm] 337.920 (H) x 270.336(V)
Pixels H x V 1280(x3) x 1024
Pixel Pitch [mm] 0.264 (per one triad) x 0.264
Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
White Luminance [cd/m
2
] 250(Typ)
Contrast Ratio 400 : 1 (Typ)
Optical Rise Time/Fall Time [msec] 45(Typ)
Nominal Input Voltage VDD [Volt] +12.0 V
Power Consumption
(VDD line +CCFL line)
[Watt]
25W(Max) (w/o Inverter, All black pattern)
Weight [Grams] 2500 (Typ)
Physical Size [mm] 398.0(W) x 328.5(H) x 25.0(D) (Typ)
Electrical Interface Even/Odd R/G/B data(8bits),3 sync signal,
Clock
Support Color 16.7M colors ( RGB 8-bit data )
Temperature Range
Operating
Storage (Shipping)
[
o
C]
[
o
C]
0 to +50
-20 to +60
2.2 Functi onal Bl ock Di agram
The following diagram shows the functional block of the 17.0 inches Color TFT-LCD Module:
TFT ARRAY/CELL
8 bi t s data
for R/G/B
Hsync
Vsync
VDD
LCD
Controller
LCD DRIVE
CARD
Backlight Unit 4CCFL
1280(R/G/B) X 1024
GND
DC-DC
Converter
Ref circuit
Y-Driver
X-Driver
DSPTMG
DTCLK
JAE FI-SE30P-HF or FI-S30P-HF
Mating Type JAE FI-S30S
LCD Drive
JST BHR-04VS-1
Mating Type SM04(4.0)B-BHS-1-TB
Lamp Connector
2.3 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature):
Item Conditions Min. Typ. Max.
Viewing Angle [degree]
[degree]
Horizontal (Right)
CR =10 (Left)
60
60
CR: Contrast Ratio [degree]
[degree]
Vertical (Upper)
CR =10 (Lower)
45
70
Contrast ratio
Normal Direction
250 400
Response Time [msec] Raising Time - 30
[msec] Falling Time - 15
[msec] Raising +Falling - 45
Color / Chromaticity Red x 0.60 0.63 0.66
Coordinates (CIE) Red y 0.30 0.33 0.36
Green x 0.27 0.30 0.33
Green y 0.57 0.60 0.63
Blue x 0.12 0.15 0.18
Blue y 0.07 0.10 0.13
Color Coordinates (CIE) White White x 0.28 0.31 0.34
White y 0.30 0.33 0.36
Luminance Uniformity (Note 1) [%] 80 85 -
White Luminance at
CCFL 6.0mA(center point)
[cd/m
2
] 200 250 -
Note 1 Measure points & Diagram
Display Length distance
x = [mm]
4
Display Width distance
y = [mm]
4
Minimum Luminance in 5 Points (1-5)
Uniformity =--
Maximum Luminance in 5 Points (1-5)
LCD Display area =337.9 x 270.4 mm
2.4 Pixel format image
Following figure shows the relationship of the input signals and LCD pixel format.
R G B R G B
R G B R G B
R G B R G B
R G B R G B
0 1 1278 1279
1st Line
1024th Line
d-y
d-y =67.60 mm
d-x
1 2
5
3 4
d-x =84.48 mm
3.0 Electrical characteristics
3.1 Absol ute Maxi mum Rati ngs
Absolute maximum ratings of the module is as following:
Item Symbol Min Max Unit Conditions
Logic/LCD Drive Voltage VIN -0.3 +13.2 [Volt]
Select LVDS data order SELLVDS -0.3 +3.3 [Volt]
CCFL Inrush current ICFLL - 38 [mA] Note 1
CCFL Current ICFL - 7.6 [mA] rms
Operating Temperature TOP 0 +50 [
o
C] Note 2
Operating Humidity HOP 8 95 [%RH] Note 2
Storage Temperature TST -20 +60 [
o
C] Note 2
Storage Humidity HST 8 95 [%RH] Note 2
Note 1 : Maximum Wet-Bulb should be 39 and No condensation.
Note 2 : Duration=50 msec.
3.2 Connectors
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
Connector Name / Designation Interface Connector
Manufacturer J AE or compatible
Type / Part Number FI-SE30P-HF or FI-S30P-HF
Mating Housing/Part Number FI-S30S
Connector Name / Designation Lamp Connector/Backlight lamp
Manufacturer J ST
Type / Part Number BHR-04VS-1
Mating Type / Part Number SM04(4.0)B-BHS-1-TB
3.3 Signal Pin
Pin# Signal Name Pin# Signal Name
1 VIN 2 VIN
3 VIN 4 AGND
5 AGND 6 AGND
7 SELLVDS 8 Reserved (No connection)
9 DGND 10 RxOIN3+
11 RxOIN3- 12 RxOCLKIN+
13 RxOCLKIN- 14 RxOIN2+
15 RxOIN2- 16 RxOIN1+
17 RxOIN1- 18 RxOIN0+
19 RxOIN0- 20 RxEIN3+
21 RxEIN3- 22 RxECLKIN+
23 RxECLKIN- 24 RxEIN2+
25 RxEIN2- 26 RxEIN1+
27 RxEIN1- 28 RxEIN0+
29 RxEIN0- 30 DGND
3.4 Signal Description
The module using a pair of LVDS receiver SN75LVDS82(Texas Instruments) or compatible. LVDS is a
differential signal technology for LCD interface and high speed data transfer device. Transmitter shall be
SN75LVDS83(negative edge sampling) or compatible. The first LVDS port(RxExxx) transmits even pixels
while the second LVDS port(RxOxxx) transmits odd pixels.
PIN # SIGNAL NAME DESCRIPTION
1 VIN 12V POWER SUPPLY
2 VIN 12V POWER SUPPLY
3 VIN 12V POWER SUPPLY
4 AGND Ground for VIN
5 AGND
Ground for VIN
6 AGND Ground for VIN
7 SELLVDS Select LVDS data order
8 Reserved No Connection
9 DGND Ground for LVDS signal
10 RxOIN3 Positive LVDS differential data input (Odd data)
11 RxOIN3- Negative LVDS differential data input (Odd data)
12 RxOCLKIN Positive LVDS differential clock input (Odd clock)
13 RxOCLKIN- Negative LVDS differential clock input (Odd clock)
14 RxOIN2 Positive LVDS differential data input (Odd data)
15 RxOIN2- Negative LVDS differential data input (Odd data)
16 RxOIN1 Positive LVDS differential data input (Odd data)
17 RxOIN1- Negative LVDS differential data input (Odd data)
18 RxOIN0 Positive LVDS differential data input (Odd data)
19 RxOIN0- Negative LVDS differential data input (Odd data)
20 RxEIN3 Positive LVDS differential data input (Even data)
21 RxEIN3- Negative LVDS differential data input (Even data)
22 RxECLKIN Positive LVDS differential clock input (Even clock)
23 RxECLKIN- Negative LVDS differential clock input (Even clock)
24 RxEIN2 Positive LVDS differential data input (Even data,H-Sync,V-Sync,DSPTMG)
25 RxEIN2- Negative LVDS differential data input (Even data,H-Sync,V-Sync,DSPTMG)
26 RxEIN1 Positive LVDS differential data input (Even data)
27 RxEIN1- Negative LVDS differential data input (Even data)
28 RxEIN0 Positive LVDS differential data input (Even data)
29 RxEIN0- Negative LVDS differential data input (Even data)
30 DGND Ground for LVDS signal
Input signals of odd and even clock shall be the same timing.
LVDS DATA Name Description
DSP Display Timing :When the signal is high, the pixel data shall be valid to be displayed
V-S Vertical Sync :Both Positive and Negative polarity are acceptable
H-S Horizontal Sync :Both Positive and Negative polarity are acceptable
TI LVDS Xmitter
SN75LVDS83
Module LVDS signal
SELLVDS(interface connector pin7)
Signal Name Low(open) High
D0 Red0 Red2
D1 Red1 Red3
D2 Red2 Red4
D3 Red3 Red5
D4 Red4 Red6
D5 Red7 Red1
D6 Red5 Red7
D7 Green0 Green2
D8 Green1 Green3
D9 Green2 Green4
D10 Green6 Green0
D11 Green7 Green1
D12 Green3 Green5
D13 Green4 Green6
D14 Green5 Green7
D15 Blue0 Blue2
D16 Blue6 Blue0
D17 Blue7 Blue1
D18 Blue1 Blue3
D19 Blue2 Blue4
D20 Blue3 Blue5
D21 Blue4 Blue6
D22 Blue5 Blue7
D23 NA NA
D24 H Sync H Sync
D25 V Sync V Sync
D26 Display Timing Display Timing
D27 Red6 Red0
Note: R/G/B data 7:MSB, R/G/B data 0:LSB
([[[V[[zw) ([[[V[[zw) ([[[V[[zw) ([[[V[[zw)
[[,[[ [[,[[ [[,[[ [[,[[
[[,[[- [[,[[- [[,[[- [[,[[-
[[,[[ [[,[[ [[,[[ [[,[[
[[,[[- [[,[[- [[,[[- [[,[[-
[[0 [[0 [[0 [[0
[[0- [[0- [[0- [[0-
[[ [[ [[ [[
[[- [[- [[- [[-
[[ [[ [[ [[
[[- [[- [[- [[-
[[3 [[3 [[3 [[3
[[3- [[3- [[3- [[3-
[(0 [(0 [(0 [(0
[(0- [(0- [(0- [(0-
[( [( [( [(
[(- [(- [(- [(-
[( [( [( [(
[(- [(- [(- [(-
[(3 [(3 [(3 [(3
[(3- [(3- [(3- [(3-
[[ [[0 [[5 [(0 [[4 [[3 [[ [[ [[0 [(0
[( [( [| [|0 [(5 [(4 [(3 [( [( [|
[|3 [| [;} V-; [-; [|5 [|4 [|3 [| [;}
[[7 [[( , [|7 [|( [(7 [(( [[7 [[( ,
([ ([0 ((0 ([5 ([4 ([3 ([ ([ ([0 ((0
(( (( (| (|0 ((5 ((4 ((3 (( (( (|
(|3 (| , , , (|5 (|4 (|3 (| ,
([7 ([( , (|7 (|( ((7 ((( ([7 ([( ,