Course 5
Course 5
Virgil Dobrota
Course 5 - Content 15. TST Switch 16. TSSST Switch 17. Examples of Telephone Exchanges and Switch Fabrics 18. Digital Telephone Exchange Functions: BORSCHT
Implementation complexity : N IC = N x + B 100 [eq. crosspoints] (38) No. of crosspoints for S stage (square matrix): Nx = N 2 [crosspoints]
(39)
Number of memory bits for S & T stages: N B = N BX + N BT = Nl log 2 N + 16 Nc + 2 Nl log 2 c [bits] N BX = control bits in S stage, N BT = control & data bits in T stage
Copyright Virgil Dobrota 2009, All rights reserved
(40)
(41)
PROBLEM 1:
a) Determine the implementation complexity for an STS switch with 2048 channels organized in 16 TDM lines, with 8 bits/channel, 128 channels/frame. The probability of having a link busy is 0.1 and the maximum blocking probability for the STS switch is 0.002. b) The same problem if the STS switch is replaced by an SSS switch with 2048 input/outputs. B and p are the same. Comment the result. c) The same problem is the STS switch is replaced by an TST switch. Comment the result.
c 2 l 128 2 l ) ] gives l=25 c) From (41) B = [1 (1 p ) ] and 0.002 = [1 (1 0.1 l the values N=16 TDM lines, ll=25 channels, temporal channels. Replacing c=128 channels in (38) (we are skipping here the steps !!!) the final result is IC= 656 [equivalent crosspoints]. Note that in this example STS appears to be more efficient with respect to implementation complexity compared to TST.
Copyright Virgil Dobrota 2009, All rights reserved
Observations: The results obtained in the previous problem cannot be generalized !!! For IC=f(p) for both STS and TST the conclusion is: p<0.2: p>0.2: IC for STS < IC for TST => STS is more efficient IC for STS > IC for TST => TST is more efficient
Having this result, in practice TST is preferred Eventually for large switches TST could be replaced by TSSST
Implementation complexity : N IC = N x + B 100 [eq. crosspoints] (43) No. of crosspoints for S stages (SSS): N N x = 2 Nk + k ( ) 2 n [crosspoints] (44)
Number of memory bits for S & T stages: N B = N BX + N BT = 2k N l log 2 n + k N l log 2 N + 16 Nc + 2 Nl log 2 c [bits] n n n N BX = control bits in S stage, N BT = control & data bits in T stage
Copyright Virgil Dobrota 2009, All rights reserved
(45)
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q1 = 1 p1 = 1 = 1 p c l p1 p = 1 = 1 p c n q2 = 1 p2 = 1 l k
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Connection Equipment)
Simulator:
http://en.wikipedia.org/w iki/AXE_telephone_excha Current and Future Strategies regarding AXE 10: upgrade nge of core networks from circuit-switched technology, based on AXE-10 to IP-based Softswitch solutions. http://el.el.obs.utcluj.ro/scr/pdf/AXE10/AXE10.EXE
Copyright Virgil Dobrota 2009, All rights reserved
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Digital)
discontinuance at NSN and migration towards Softswitch solutions Post-warranty equipment still produced by Siemens
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Simulator: http://el.el.obs.utcluj.ro/scr/pdf/E10B/E10B.EXE
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switch fabric 512 x 512 OC-48 OC48 = 2.5 Gbps interfaces 3-stage Clos switch Optic/Electric/Optic (OEO)
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384 x 384 OC-192 (10 Gbps) 96 x 96 OC-768 (40 Gbps) 5-stage Clos switch O/E/O
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RP (Route Processor), PLIMs (Physical Layer Interface Modules), MSCs (Modular Service Cards), S1 (Stage 1), S2 (Stage 2), S3 (Stage 3), OC-192 (Optical Carrier at 10 Gbps)
[Source: http://www.cisco.com/en/US/docs/routers/crs1/8_slot/system/ description/hq6345_4.html ]
Copyright Virgil Dobrota 2009, All rights reserved
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BORSCHT Functions
B (Battery) = power supply. Digital exchange should be able to operate normally in case of O (Over-voltage Protection) = protection against internal and external R (Ring) = alerting the subscribers. Example: 75 V/ 50 Hz for analog telephones
maintenance and traffic information
power supplys failure due to its own battery box. Example: 48V/15AH
S (Supervision) = full supervision of all modules and provision of operating, C (Coding) = actually is about digital encoding of the information. H (Hybrid) = 2-wire to 4-wire adaptation, i.e. separation between
transmission and receiving
Examples: Delta modulation, G.711 (PCM, 8 bits, 64 kbps). G.722 (ADPCM, 4 bits, 32 kbps), G.723 (LPAS, 5.3/6.4 kbps), G.728 (LD-CELP, 16 kbps), G.729 (LD-CELP, 8 kbps)
T (Test) = testing facilities for local loops and any functional blocks. The new
switching systems are based on a fault tolerant approach.
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Conclusions
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Conclusions (I)
Classical TDM-based switches used in circuit switching will evolve towards IP-based soft-switches and packet-switching High-speed switching systems will remain based on Clos, Banyan, Batcher-Banyan, Benes etc. but with more intelligence: routing, fault tolerance etc.
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Conclusions (II)
From other point of view, the switches studied within this chapter were the following: Crossbar switches (square matrix, Clos)
.
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