CHAPTER 1: OP-AMPS

I. PRACTICAL OP-AMP

An operational amplifier, or op-amp, is an electronic device having very high gain differential amplifier, A, high input impedance, Zin, and low output impedance, Zout as shown in Figure a. Typical uses of op-amp are to provide voltage amplitude changes (amplitude and polarity), oscillators, filter circuits, and many types of instrumentation circuits. Figure below shows a schematic diagram and a symbol of an op-amp.
+VCC

Noninverting input

+ zout vin Zin Avin

Inverting input

_
-VEE

Figure a: Op-amp schematic diagram

+ vin _

vout

Figure b: Symbol of an op-amp The op-amp operates using two power supplies, +VCC and VEE, (some op-amps can operates using a single supply, i.e., -VEE is grounded). The op-amp input, vin, to the differential amplifier is the difference between two input voltages: the non-inverting input and the inverting
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input. The op-amp has a single-ended output. Op-amp also has an input impedance, zin, an output impedance, zout, and a voltage gain A as shown in the schematic diagram above. The output voltage of the op-amp can be express in term of the input voltage and the gain of the amplifier as: vo=Avin A typical op-amp has very high gain, very high input impedance (zin is in the range of M ) and very low output impedance (zout is less than 100 ). Below is a simple block diagram of an op-amp. The differential amplifier takes two inputs and amplifies the difference, the gain stage contains many amplification stages to achieve high gain of the op-amp and the output stage (a class B amplifier) provides high current gain with low output impedance.
DIFF. AMPLIFIER CLASS B PUSH-PULL AMPLIFIER vout

vin

GAIN STAGE

OP-AMP

1. Input characteristics of an op-amp 1. Input bias current

Figure 17-13: Different base current Since the DC of each transistor in the first stage is slightly different, the base currents in the differential amplifier above are slightly different. The input bias current is defined as the average of the DC base currents: I +I I in ( base) = B1 B2 2

The bias current is typical in nano-amperes (BJT) or pico-amperes (FET) and will flows through the resistances between the bases and ground. These resistances may be discrete resistances or they may be the Thevenin resistances of the input sources.
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2. Input offset current The input offset current is defined as the difference of the DC base currents: Iin(off) = IB1 IB2 This difference in the base currents indicates how closely the transistors Q1 and Q2 are matched. If the transistors are identical, the input offset current is zero because both base currents will be equal, but almost always, the two transistors are slightly different and the two base currents are not equal. Data sheet of an op-amp lists Iin(base) and Iin(off), the base current through each transistor can be calculated using two equations above. The base currents can cause output voltage error in precision applications. A compensate resistor may be use to eliminate the effect of the input offset current as shown in Figure 17-14b.

Figure 17-14: a) Base resistor produces unwanted input voltage; b) equal base on other side reduces error voltage 3. Input offset voltage

More errors caused by the imperfect match of the differential amplifier stage are collector resistances (RC1 RC2) and base-emitter voltages (VBE1VBE2) as shown in figure below.

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The input offset voltage is defined as the input voltage that would produce the same output error voltage in a perfect differential amplifier. V Vin (off ) = error A

Figure 17-16: Output of diff amp includes desired signal and error voltage

Total error: DC error inputs:

Vin = v1 v2 Vout = A(v1 v2) V1err = (RB1 - RB2)Iin(bias) V2err= (RB1 + RB2)Iin(off)/2 V3err = Vin(off) Verr = A (V1err + V2err + V3err)

Table 3: Sources of Output Error Voltage

Description Input bias current Input offset current Input offset voltage

Cause Voltage across a single RB Unequal current gains Unequal RC and VBE

Solution Use equal RB on other side Data sheet nulling methods Data sheet nulling methods

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2. The 741 op-amp

Some noticeable characteristics on this industry standard op-amp are useful to design opamp application circuits:
a. The final stage The quiescent output is ideally 0V when the input voltage is zero (assuming an equal positive and negative supply voltages). Any deviation from 0V is called the output error voltage. The output swing is within 1 to 2V of each supply voltage because of voltage drops inside the op-amp. b. Frequency compensation The capacitor CC is a compensating capacitor. Miller effect causes this capacitor become a large input capacitance of: Cin = (A+1)CC where A is the gain of Q5 and Q6.

This capacitor generates a cutoff frequency of 10Hz and the op-amp has an ideal Bode plot as shown in the figure below. AOpen Loop 100dB

freq. 10Hz
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1MHz
5

c. Bias and offsets Figure below shows the compensation and nulling used with 741C op-amp. The resistor RB neutralizes the effect of input bias current (80nA). The 10K potentiometer is used to null or zero the output voltage with no input signal present. This eliminates the effect of an input offset current of 20nA and an input offset voltage of 2mV.

d. CMRR (Common Mode Rejection Ratio)

The CMMR is 90dB at low frequency but degrades at higher frequency according to the curve (a) below.

e. Maximum peak-to-peak output

The maximum peak-to-peak output voltage produced by 741 op-amp depends on the load resistance connected to its output as shown in curve (b).
f. Short circuit current

The maximum short circuit current at the output which the 741 op-amp can withstand is 25mA. This is also the maximum current can be produced by the op-amp and delivered to the load.
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g. Frequency response

Curve (c) shows the actual frequency response of the 741 op-amp with a unity frequency of 1MHz. This op-amp is considered worthless for higher frequency applications (i.e., attenuation instead of gain). Other op-amps are available for use at high frequency.
h. Slew rate

The compensation capacitor, CC, prevents oscillations (capacitor CC acts as negative feedback) that would interfere with the desired signal. However, this capacitor also creates a speed limit on how fast the output of the op-amp can change. This relates to the slew rate of the op-amp which is defined as: v S R = out t

time.

where SR is the slew rate and equals to the change in output voltage divided by the change in

The slew rate represents the fastest response that an op-amp can have. The 741C has a slew rate of 0.5V/s. This means that the output of a 741C can change no faster than 0.5V in a microsecond (figure (c) above). Slew arte also affects the response of sinusoidal signal as shown in the figure below.

Slew rate limits large-signal response of an op-amp and this quantity always specifies in the data sheet. The initial slope of a large sinusoidal signal, can be derived as:
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SS = 2fVp To avoid slew-rate distortion, SS has to be less than or equal to SR of the op-amp. The maximum frequency at which the signal is on the verge of slew-rate distortion can be found as:
SR = SS = 2fVp S f max = R 2Vp

This frequency is sometimes called the power bandwidth or large-signal bandwidth of the op-amp. Therefore, there are two bandwidth to be considered when analyzing the operation of an op-amp circuit: the small-signal bandwidth determined by the first order response of the op-amp (by compensation capacitor Cc) and the large-signal or power bandwidth determined by the slew rate SR.
Example : 18-1 to 18-4 (page 628).

II.

IDEAL OP-AMP

To analyze circuits using op-amps, the ideal op-amps are used to simplify the process. Some characteristics of the ideal op-amp are:
+VCC

I+=0 zin= va=0 Avin zout=0

. Gain A . zin= . zout=0 . input currents I+=0 . input current I_=0 . va=v+ - v-=0 because vo=Ava, va=vo/A=vo/

i.e., operation depends

on external connection.

I_=0

-VEE

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1. INVERTING AMPLIFIER:
The inverting amplifier is an important op-amp circuit. The inverting amplifier uses negative feedback to stabilize the overall voltage gain of the amplifier because the open-loop gain of the opam is too high and the circuit will be unstable to be used without some forms of feedback. The circuit is analyzed as below using the ideal op-amp characteristics. Because of I+=I_=0, va=0:
va = 0 i in = v in R2 i R1 = i in = R1 R2 v in R2

R1

I+ = I _ = 0
R2 iin va _ + RL iR2 vo

v o = i R1R1 = v in v o = v in R1 R2

~v

in

Gain : A (CL) = z in (CL) = R 2 f 2(CL) = f unity A CL

R1 R2

The plot of the inverting amplifier gain versus frequency is shown below. The op-amp has an open loop gain, A(OL), and an open loop cutoff frequency f2(OL). For the feedback configuration, the amplifier has a close loop gain, A(CL), and a close loop frequency f2(CL). When the gain is 0dB (i.e., gain=1=unity), the amplifier has a frequency of f(unity).
Gain A(dB) A(OL) Open Loop response Closed Loop response A(CL)

f2(OL)

f2(CL)

funity

frequency

Example: 18-7

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2. NON-INVERTING AMPLIFIER:
This feedback amplifier provides an output voltage in phase with the input voltage. The analysis of this circuit also uses the ideal op-amp.

~v

va=0

+ _ R1

vo

v i R 2 = in R2 I = 0 i R1 = i R 2 v v o = v in + i R 2 R1 = v in + in R1 R2 R1 ) v o = v in (1 + R2 R2 Gain : A (CL) = 1 + R1

in

iR2

R2

Example: 18.10

3. SUMMING AMPLIFIER:
R1 R2 R3

v1

_ +

vo

v o = (

R3 R3 v1 + v2) R1 R2

~ v2

Example: 18-12

Problem: 18-22, 18-26 Try: 18-9, 18-11,18-13,18-21,18-23,18-27

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4. INTEGRATOR
The output of the integrator is proportional to the integral over time of its input signal (example, a constant input vi yields a ramp output). C
vo = 1 vi dt RC

_ +

vo

~v
5. DIFFERENTIATOR

The output of the integrator is proportional to the differential over time of its input signal (example, a ramp input vi yields a constant output). R C

_ +

vo

~v

dv vo = RC i dt

6. INSTRUMENTATION AMPLIFIER
+ _

va

Rb Ra Rb

Rc

Rd

+ _ _ +

A=

(2 R b + R a ) R d RaRc

Rc

vb

Rd

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