L08 CPU Function
L08 CPU Function
Hoganson
L08-CS8421-9-15-08
CPU Functions
CS8421 Computing Systems Dr. Ken Hoganson
Class Will
Start Momentarily
Copyright 2004, 2006, Dr. Ken Hoganson
Topics
CS 8421 Computing Systems, Dr. Hoganson
Simple Memory PLA Half-Adder Exclusive-OR Topics from Chapter 3, Stallings: CPU Internal Components Instruction Cycle Diagram A Simple Example Computer Tracing Instruction Execution
Initial State?
AB = A + B A+ B = AB
Copyright 2004, 2006, Dr. Ken Hoganson Show single bit memory from multiplexor. Build from selector+multiplexor+feedback..
Copyright 2004, 2006, Dr. Ken Hoganson Initially, all lines connected. Programmed by blowing fusable links with large voltage. Some details abstracted.
Half-Adder
CS 8421 Computing Systems, Dr. Hoganson
CPU must do (at a minimum) ADD, AND, COMPLEMENT. All other operations can be made from these fundamentals (but slow). Half-Adder: adds two bits together without a carry-in.
Copyright 2004, 2006, Dr. Ken Hoganson Show TT: I1, I2, Sum, Carry. Draw with AND, OR, Invertor. Show symbol for HA.
Exclusive-OR
CS 8421 Computing Systems, Dr. Hoganson
Copyright 2004, 2006, Dr. Ken Hoganson Introduce X-OR. TT and gates. Show HA with X-OR for SUM, and AND for carry.
CPU Functions
CS 8421 Computing Systems, Dr. Hoganson
At a minimum, the CPU must do: Addition AND COMPLEMENT All other operations can be done with combinations: Subtraction is performed by complementing and adding NAND is a NOT AND NAND is a complete set of operations, so can be used to do all other Boolean operations Computers actually build separate logic for other ops for better performance. We know how to build AND and NOT gates Need to explore how to do Addition
Copyright 2004, 2006, Dr. Ken Hoganson
CPU has three major components Register Bank - a set of registers Temporary storage of values in the CPU while processing ALU - Arithmetic Logic Unit Control Unit - controls the sequence of events Memory stores data and programs (secondary storage is disk) Memory is an array of storage locations Each location has an address, numbered sequentially
Copyright 2004, 2006, Dr. Ken Hoganson
Microcomputer Architecture
CS 8421 Computing Systems, Dr. Hoganson
CPU
Inst Cache Inst Cache
Focus on the CPU today. Assume cache works invisibly behind the scenes, will be ignored for this discussion.
Cache on MB
Main Mem
H-S I/O
Op Sys
I/O Dev
ALU
CS 8421 Computing Systems, Dr. Hoganson
ALU operates on registers Comparisons Math operations manipulating bits Implemented with logic gates (AND, NAND) Operates on values stored in registers, sometimes with memory values Takes data in registers, manipulates, outputs results back to registers which operation is performed is determined by the bits in the computer instruction. The process of determining which operation to perform is called decoding
Copyright 2004, 2006, Dr. Ken Hoganson
Control Unit
CS 8421 Computing Systems, Dr. Hoganson
Controls the sequence of events Implemented with gates and clocks generates control signals, like the one that determines read or write on a register of D flipflop One traditional computer system, the control unit takes up most of the available transistor-space on the CPU chip
CPU Internals
CS 8421 Computing Systems, Dr. Hoganson
Interrupt Check
Pg 63 in Stallings
Copyright 2004, 2006, Dr. Ken Hoganson
IF
4-bits first Hex digit is Opcode: 0001 Load AC from Mem 0010 Store AC to Mem 0101 Add Mem to AC Pg 62 in Stallings
Load +
IF +
Add
IF
Copyright 2004, 2006, Dr. Ken Hoganson
Store
Homework
CS 8421 Computing Systems, Dr. Hoganson
Extend/continue the program fragment: Write instructions (starting at location 303) that will: subtract the contents of memory location 942 from the contents of the accumulator Store the result in memory location 943 We will choose 3 to be the opcode for subtract memory from the accumulator
End of Lecture
CS 8421 Computing Systems, Dr. Hoganson
Blank Slide
CS 8421 Computing Systems, Dr. Hoganson