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Nptel Cad1 10 PDF

This document discusses various operators used in Verilog syntax including arithmetic, logical, relational, equality, bitwise, reduction, shift, concatenation, replication, and conditional operators. It provides examples of how each operator functions and precedence between operators from highest to lowest. Key operators covered include basic arithmetic functions like addition and subtraction, logical operators like AND and OR, relational operators for comparisons, bitwise operators like AND and XOR, and shift operators for bit manipulations.

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Ankit Pawar
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159 views27 pages

Nptel Cad1 10 PDF

This document discusses various operators used in Verilog syntax including arithmetic, logical, relational, equality, bitwise, reduction, shift, concatenation, replication, and conditional operators. It provides examples of how each operator functions and precedence between operators from highest to lowest. Key operators covered include basic arithmetic functions like addition and subtraction, logical operators like AND and OR, relational operators for comparisons, bitwise operators like AND and XOR, and shift operators for bit manipulations.

Uploaded by

Ankit Pawar
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CAD for VLSI Design - I Lecture 10

V. Kamakoti and Shankar Balachandran

Overview
Understanding Verilog Syntax
Operators in Verilog

Recap
Verilog Lexicon Numbers Vectors Arrays Time Regs and Nets Parameters

Continuous Assignment
assign out = i1 & i2; assign addr[15:0] = addr1[15:0]^addr2[15:0];
assign {cout,sum[3:0]} = a[3:0]+b[3:0]+c_in; wire out; assign out = in1 & in2; is equivalent to wire out = in1 & in2; //Implicit continuous assignment

Expressions
Dataflow modeling describes the design in terms of expressions instead of primitive gates. Expressions those that combine operands and operators a ^ b; addr1[20:17] + addr2[20:17]; in1 | in2;

Operands
Constants, integers, real numbers Nets, Registers Times Bit-select
One bit of a vector net or vector reg

Part-select
Selected bits of vector net or vector reg

Memories

Operands (Example)
integer count, final_count; real a,b,c; reg [15:0] reg1, reg2; reg [3:0] reg_out; reg_out = reg1[3:0]^reg2[4:1]; //part-select reg ret_value; ret_value = cal(A,B); //function type operand

Operators - Types
Arithmetic Logical Relational Equality Bitwise Reduction // Not available in software languages Shift Concatenation Replication Conditional Syntax very similar to C

Arithmetic Operators
Binary Operators * - multiply / - division + - addition - subtraction If any bit is x, then whole result is x Commercial Verilog gives non x values whenever possible
a = 4b0x11; b = 4b1000; a+b = 4b1x11; a = 4b0x11; b = 4b1100; a+b = 4bxx11;

Arithmetic Operators (Extended)


Binary Operators remainder or modulus operator (%) -7 % 2 = -1; 7 % -2 = 1; always takes sign of the first operand similar to C Unary Operators +5 and 4, the negatives are stored as twos complement default 32-bit, else the specified number of bits. For eg. a = -4b0011 is stored as 1101

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Logical Operators
logical and (&&), logical or (||), logical not (!).
They evaluate to a 1-bit value: 0 (false) 1 (true) or x (ambiguous) If an operand is not equal to zero, it is a logical 1 and if it is equal to zero, it is a logical 0. If any operand bit is x or z, then operand is x and treated by simulators as a false condition Logical operators take variables or expressions as operands.

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Logical Operators (Example)


A = 3; B = 0;
A&&B, A||B evaluates to 0 and 1 resp. !A, !B evaluates to 0 and 1 resp.

A = 2b0x; B = 2b10;
A&&B evaluates to x

(a==2) && (b == 3) //Expressions

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Relational Operators
Greater-than (>) Less-than (<) Greater-than-or-equal-to (>=) Less-than-or-equal-to (<=) Evaluates to 1 or 0, depending on the values of the operands
If one of the bits is an x or z, it evaluates to x

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Relational Operators (Example)


//A = 4, B = 3 //X = 4b1010, Y = 4b1101, Z = 4b1xxx A <= B //returns 0 A > B //returns 1 Y >= X //returns 1 Y < Z //returns x

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Equality Operators
Logical equality (==), logical inequality (!=) if one of the bits is x or z, they output x else returns 0 or 1 Case equality (===), case inequality (!==) compares both operands bit by bit and compare all bits including x and z. Returns only 0 or 1

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Equality Operators - Examples


//A = 4;B = 3;X = 4b1010;Y = 4b1101 //Z = 4b1xxz;M = 4b1xxz;N = 4b1xxx A == B // result is 0 X != Y //result is 1 X == Z // result is x Z === M //result is 1 Z === N //result is 0 M !== N //result is 1

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Bitwise Operators
negation (~), and (&), or (|), xor (^), xnor(^~, ~^). z is treated as x in the bitwise operations Some truth tables :
0 and 0 1 x z 0 0 0 0 0 1 x x 0 x x x 0 x x x 1 x z or 0 1 x z xor 0 1 x z 0 0 1 x x 0 0 1 x x 1 1 1 1 1 1 1 0 x x x x 1 x x x x x x x z x 1 x x z x x x x
buf in out 0 1 x z 0 1 x x 0 1 x z not in out 1 0 x x

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Bitwise Operators - Examples


//X = 4b1010;Y = 4b1101;Z = 4b10x1 ~X // result is 4b0101 X & Y // result is 4b1000 X | Y // result is 4b1111 X ^ Y // result is 4b0111 X ^~ Y // result is 4b1000 X & Z // result is 4b10x0

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Point to note
We distinguish between bitwise operators and logical operators //X = 4b1010;Y = 4b0000 X | Y // result is 4b1010 X || Y // result is 1

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Reduction Operators
Reduction operators perform a bitwise operation on a single vector operand and yield a 1-bit result. Reduction operators work bit by bit from right to left.

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Reduction Operators - Examples


and (&), nand (~&), or (|), nor (~|), xor (^); and xnor (~^,^~) This is a UNARY operation on vectors //X = 4b1010 &X is 1b0 //0 & 1 & 0 & 1 |X is 1b1 ^X is 1b0 A reduction xor or xnor can be used for even or odd parity generation of a vector.

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Shift Operators
Right shift (>>) and left shift (<<) //X = 4b1100 Y = X >> 1; // Y is 4b0110 Y = X << 1; // Y is 4b1000 Y = X << 2; // Y is 4b0000 Very useful for modeling shift-and-add algorithms for multiplication.

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Concatenation Operator
Denoted by ({,}) Append multiple sized operands. Unsized operands are NOT allowed as size of each operand should be known to compute size of the result //A=1b1;B=2b00;C=2b10;D=3b110; Y = {B,C} // Y is 4b0010 Y = {A,B,C,D,3b001} // Y is 11b10010110001
Y = {A, B[0],C[1]} // Y is 3b101

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Replication Operator
Repetitive concatenation of the same number can be represented using a replication constant A = 1b1; B=2b00; Y = { 4{A} }; //Y is 4b1111 Y = {4{A},2{B}}; //Y is 8b11110000

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Conditional Operator
Usage: condition_expr?true_expr:false_expr; If condition evaluates to x, then both expressions are evaluated and compared bit by bit to return for each bit position, an x if the bits disagree, else the value of the bit. The conditional expression models a 2-to-1 multiplexer assign out = control?in1:in0;
2-to-1 Mux 1 True_expr

False_expr

Condition expression

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Operator Precedence
From Highest to Lowest Unary +,-,!,~ Binary *,/,% Binary +,<<,>> <,>,<=,>= ==,!=,===,!== Reduction &, ~&,^,^~,|,~| Logical &&, || Conditional ?: Recommended to use parentheses

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Questions and Answers

Thank You

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