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Seventh Semester B. Tech. Degree Examination: (Answer All Questions: 5 X 2 Marks 10 Marks)

This document provides a model question paper for the Digital Signal Processing exam for the 7th semester of the B. Tech. degree in Electrical and Electronics Engineering. It consists of 3 parts - Part A contains 5 multiple choice questions worth 2 marks each (10 marks total), Part B contains 4 out of 6 short answer questions worth 5 marks each (20 marks total), and Part C contains 2 out of 4 long answer questions worth 10 marks each (40 marks total). The questions cover topics such as the discrete Fourier transform, FIR and IIR filters, filter design techniques including impulse invariant, cascade/parallel forms, state-space models, and fixed-point DSP implementations.

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Gīřïşh Mc
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143 views2 pages

Seventh Semester B. Tech. Degree Examination: (Answer All Questions: 5 X 2 Marks 10 Marks)

This document provides a model question paper for the Digital Signal Processing exam for the 7th semester of the B. Tech. degree in Electrical and Electronics Engineering. It consists of 3 parts - Part A contains 5 multiple choice questions worth 2 marks each (10 marks total), Part B contains 4 out of 6 short answer questions worth 5 marks each (20 marks total), and Part C contains 2 out of 4 long answer questions worth 10 marks each (40 marks total). The questions cover topics such as the discrete Fourier transform, FIR and IIR filters, filter design techniques including impulse invariant, cascade/parallel forms, state-space models, and fixed-point DSP implementations.

Uploaded by

Gīřïşh Mc
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Seventh Semester B. Tech.

Degree Examination
Electrical and Electronics Engineering

EE09 703/PTEE09 703: DIGITAL SIGNAL PROCESSING


Model Question Paper

Time: 3 hours

Maximum Marks: 70 Part A (Answer all questions: 5 x 2 marks = 10 marks)

1. State the convolution property of discrete fourier transform (DFT). 2. Compare the number of multiplications required for determining the 8-point DFT by direct

computation and fast fourier transform. 3. What is the reason that FIR filter is always stable? 4. What is warping effect? 5. What are the two kinds of limit cycle behavior in DSP? PART B
(Answer any four questions: 4 x 5 marks = 20 marks) 6. Find the IDFT of X (k ) = {1, 0,1, 0} 7. Obtain the linear convolution of the sequences x(n) = {1, 2,3} and h(n) = {1, 2} using

circular convolution.
8. Obtain the cascade realization of system function H ( z ) = (1 + 2 z1 z2 )(1 + z 1 z 2 ) . 9. Determine the order and the poles of low pass Butterworth filter that has 3 dB attenuation

at 500Hz and an attenuation of 40dB at 1000Hz.


10.An analog filter has a transfer function H ( s) = this using impulse invariant method.
10 . Design a digital filter equivalent to s + 7 s +10
2

11. Compare the Von Neumann and Harvard Architecture.

PART C (Answer section (a) or section (b) of each question: 4 x 10 marks = 40 marks)
12. (a) Given a sequence x(n) = {0,1, 2,3, 4,5, 6, 7} , determine X (k) using DIF FFT algorithm.

(10 marks) OR (b Find the linear convolution of the following sequences x(n) = {1, 2, 1, 2,3, 2, 3, 1,1,1, 2, 1} and h( n) = {1, 2} using overlap-save method. (10 marks)

University of Calicut B.Tech. 2009 admissions Model Question 1

13. a)
H ( z) =

marks)

2( z + 3) . z + 0.3 z + 0.02
2

Realize the following using direct form 1, direct form 2, cascade and parallel form. (10 OR

b)

i) ii)

Obtain the lattice ladder structure H ( z) = Determine the state-space model

2 + 3z 1 + 4 z 2 . 1 + 6 z 1 + 5z 2

(5 marks) described by

y[ n] = y[ n 1] + 0.11 y[ n 2] + x[n] and sketch the type 1 state-space realization. (5 marks)

for

the

system

H d (e j ) = e j3
14. a) i) Design a filter with

=0

4 4 . < 4

Using a Hamming window (10 marks)

with N=7. b)

OR Design a Chebyshev filter for the following specification using bilinear 0.8 H (e j ) 1 0 0.2 transformation method. . (10 marks) H (e j ) 0.2 0.6
15. a) Discuss the working of a fixed point digital signal processor with block diagram.

(10 marks) OR (b) i) Compare the fixed point and floating point arithmetic. (5 marks) ii) What are the three quantization errors due to finite word length registers in digital filters? (5 marks) ******

University of Calicut B.Tech. 2009 admissions Model Question 2

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