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ESL iLBC DataSheet

iLBC is a speech codec developed for robust voice communication over IP networks. It uses block-independent linear predictive coding to encode narrowband speech sampled at 8 kHz. The codec supports frame lengths of 20 or 30 ms for bitrates of 15.2 or 13.3 kbps respectively, and allows for graceful speech quality degradation when packets are lost. It has a frame-based design, supports full-duplex multi-channel use, and runs on platforms including TMS320C64X, ARM9E and Coldfire processors.

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40 views

ESL iLBC DataSheet

iLBC is a speech codec developed for robust voice communication over IP networks. It uses block-independent linear predictive coding to encode narrowband speech sampled at 8 kHz. The codec supports frame lengths of 20 or 30 ms for bitrates of 15.2 or 13.3 kbps respectively, and allows for graceful speech quality degradation when packets are lost. It has a frame-based design, supports full-duplex multi-channel use, and runs on platforms including TMS320C64X, ARM9E and Coldfire processors.

Uploaded by

Yuri Terrorhamster
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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Product Literature

Encores iLBC
Technology
iLBC is a speech codec developed for robust voice communication over IP. It is based on block-independent linear-predictive coding (LPC) algorithm. It is designed for narrow band speech, with a sampling rate of 8 kHz. The iLBC codec supports two basic frame lengths, giving a bit-rate of 13.3 kbps with an encoding frame length of 30 ms and 15.2 kbps with an encoding frame length of 20 ms. The codec enables graceful speech quality degradation in the case of lost frames, which occurs in connection with lost or delayed IP packets.

Features
Frame based design. The code is designed to work on a frame basis, 160 samples (20 msec) and 240 samples (30 msec). Full duplex multi-channel capability. Flexible interface with C callability, with a single archive file for all functions. Built-in scratch memory management to avoid run-time overloading of system stack memory. The code is interruptible and frame re-entrant. It can be used in systems with multi threaded software architecture.

Platforms
TMS320C64X ARM9E Coldfire (MCF52xx, 53xx, 522xx)

Performance Numbers
Program Memory (KBytes) 74.85 106.0 55.5 Data Memory (KBytes) Static/ Scratch Tables Channel 2.7 8.3 6.8 2.7 8.3 6.8 2.7 8 6.6

Platform TMS320C64X ARM9E MCF52xx, 53xx, 522xx

MIPS 11.9 *45.0 77

* This cycle was measured with 0 wait state memory, 16 Kbytes I/D cache, 32 bit bus width, ratio of core clock to bus clock=1

Availability
Now

For further information please visit our web site, http://www.ncoretech.com or email to: [email protected]

All trademarks, registered and unregistered, used in this document are properties of respective owners. This is a Preliminary Specification only and hence is subject to Change without notice

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