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The document discusses determining parameters for NMOS and PMOS common-source amplifiers such as overdrive voltage, intrinsic gain, and small-signal gain. It lists 5 questions about calculating these parameters for different transistors and circuit configurations. The final question discusses ways to increase gain such as increasing the width-to-length ratio, increasing the drain-source voltage, or decreasing the drain current within the limits of the technology and supply voltage.

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Khaja Shaik
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29 views

Assignmnt

The document discusses determining parameters for NMOS and PMOS common-source amplifiers such as overdrive voltage, intrinsic gain, and small-signal gain. It lists 5 questions about calculating these parameters for different transistors and circuit configurations. The final question discusses ways to increase gain such as increasing the width-to-length ratio, increasing the drain-source voltage, or decreasing the drain current within the limits of the technology and supply voltage.

Uploaded by

Khaja Shaik
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CMOS ANALOG DESIGN

DESIGN
Assignment

By Sainath Nambiar 201021011

QUESTION :1
Determine Vod (Overdrive Voltage, Intrinsic Gain (gm * ro)) of a Common-source NMOS Transistor. Given Vds = 1V. Vgs for Vds is 0.57281 V ro is 282.45k Vgs-Vth=0.091V

QUESTION :2
For DC gain =75 , find out the parameters that can be varied . Id, Vgs as above = 0.389 As they are already calculated only variable is Wn/Ln which is set to 1.43u/0.26u.

When Vin<Vth, Vout increases due to presence of current source its effective resistance increases and gets close to Vdd

QUESTION :3
Designing the same circuit as Question 1 with PMOS gm = 1.27mho ,r0= 404.85k, Vds= 1V , Vod = 0.122V

QUESTION :4
gm = 127u ro =404.45k Vds= 1V Vod = 0.091V

Small-signal gain : 24 ,Gain Theoretical: 12.58dB

QUESTION :5 Plot of Vout and Vin

QUESTION :6
To have a large gain , we can do the following Increase W/L: We can make the W/L ratio large, but not sufficiently large as that would lead to large capacitances and circuit speed gets decreased. Also small L leads to decrease in ro and is characterized by technology process used. Increase Vds: We can increase Vds but not beyond supply voltage. Decrease Id: Assuming constant Vds , we get smaller gm and large ro , but would give larger time constants.

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