This document describes experiments involving data transfer and arithmetic instructions for an 8085 microprocessor. It explains the functions of various data transfer instructions like MVI, MOV, LXI, and XCHG. It also explains arithmetic instructions like INR, ADD, ADI, ADC, DAA, INX, DCX, and DAD that perform operations on registers and affect flags. Examples are provided to demonstrate how to use the instructions to perform operations like addition, subtraction, and moving data.
This document describes experiments involving data transfer and arithmetic instructions for an 8085 microprocessor. It explains the functions of various data transfer instructions like MVI, MOV, LXI, and XCHG. It also explains arithmetic instructions like INR, ADD, ADI, ADC, DAA, INX, DCX, and DAD that perform operations on registers and affect flags. Examples are provided to demonstrate how to use the instructions to perform operations like addition, subtraction, and moving data.
This document describes experiments involving data transfer and arithmetic instructions for an 8085 microprocessor. It explains the functions of various data transfer instructions like MVI, MOV, LXI, and XCHG. It also explains arithmetic instructions like INR, ADD, ADI, ADC, DAA, INX, DCX, and DAD that perform operations on registers and affect flags. Examples are provided to demonstrate how to use the instructions to perform operations like addition, subtraction, and moving data.
This document describes experiments involving data transfer and arithmetic instructions for an 8085 microprocessor. It explains the functions of various data transfer instructions like MVI, MOV, LXI, and XCHG. It also explains arithmetic instructions like INR, ADD, ADI, ADC, DAA, INX, DCX, and DAD that perform operations on registers and affect flags. Examples are provided to demonstrate how to use the instructions to perform operations like addition, subtraction, and moving data.
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University of Technology Laser and Optoelectronics Engineering Department 8085 Microprocessor Lab.
2010-2011
EXPERIMENT NO. 2 DATA TRANSFER AND ARITHMETIC INSTRUCTIONS
OBJECT: To understand and to program the 8085 microprocessor with programs utilizing the data transfer and arithmetic instruction groups. THEORY An instruction in the data transfer group, transfers data from a source location to a destination location. Either of these may be a memory location or a register.
The data transfer operations are:
1. MVI rd , byte :- This instruction moves the immediate data given after the instruction into register rd. 2. MOV rd , rs :- This instruction moves data from register rs to register rd. 3. LXI rp, 16-bit:- This instruction moves 16-bit data or address to register pair. 4.XCHG: The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. No 1. 2. 3. Instruction MVI rd,byte MOV rd,rs LXI rp,16-bit Type Data transfer Data transfer Data transfer No. of Bytes 2 1 3 Function rd=byte rd=rs rp=16-bit (data/ address) Lreg=Lbyte, Hreg=Hbyte HL DE Effect on flags None None None
4.
XCHG
Data Transfer
None
rd: destination register (8-bit), rs: source register (8-bit). rp: register pair (16-bit): (BC, DE, and HL) 1
University of Technology Laser and Optoelectronics Engineering Department 8085 Microprocessor Lab. 2010-2011
The arithmetic operations are:
The arithmetic instructions perform operations on the data stored in memory or registers and affect the flag register. These instructions are: 1. 2. INR r :- This instruction increments the contents of the register r. r=r+1 ADD r :- This instruction adds the contents of the register r to the accumulator, and store the results back into the accumulator. A=A+r ADI byte:- This instruction adds 8-bit data (byte) to the accumulator, and stores the results back into the accumulator. A=A+byte
3.
4. ADC r :- This instruction adds the contents of the register r to the accumulator, but also adds the carry from pervious step, and store the results back into the accumulator. A=A+r+Cy 5. ACI byte :- This instruction adds 8-bit data to the accumulator, but also adds the carry from pervious step, and store the results back into the accumulator. A=A+byte+Cy 6. DCR r :- This instruction decrements the contents of the register r. r=r-1 7. SUB r :- This instruction subtracts the contents of the register r from the accumulator, and stores the results back into the accumulator. A=A-r 8. SUI byte:- This instruction subtracts 8-bit data (byte) from the accumulator, and stores the results back into the accumulator. A=A-byte 9. SBB r :- This instruction subtracts the contents of the register r from the accumulator, but also subtracts the carry from pervious step, and store the results back into the accumulator. A=A-r-Cy
University of Technology Laser and Optoelectronics Engineering Department 8085 Microprocessor Lab. 2010-2011
10. SBI byte :- This instruction subtracts 8-bit data from the accumulator, but also subtracts the carry from pervious step, and store the results back into the accumulator. A=A-byte-Cy 11. DAA:- This instruction converts the contents of accumulator from a binary value to two 4-bit binary coded decimal (BCD) digits. This is the only instruction that uses the auxiliary flag to perform the binary to BCD conversion. The conversion procedure is as follow:If the value of the low-order 4-bits in the accumulator is greater than 9 or if the AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the accumulator is greater than 9 or if the carry flag is set, the instruction adds 6 to the high-order four bits. A=BCD number (A) 12. INX rp :- This instruction increments the contents of the register pair rp. rp=rp+1 13. DCX rp :- This instruction decrements the contents of the register pair rp. rp=rp 1 14. DAD rp:- This instruction adds the contents of the register pair rp to the contents of register pair HL and store the result back into the HL. HL=HL +rp
University of Technology Laser and Optoelectronics Engineering Department 8085 Microprocessor Lab. 2010-2011
Notes:No 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. Instruction INR r ADD r ADI byte ADC r ACI byte DCR r SUB r SUI byte SBB r SBI byte DAA INX rp DCX rp DAD rp Type arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic arithmetic No. of Bytes 1 1 2 1 2 1 1 2 1 2 1 1 1 1 Function r=r+1 A=A+r A=A+byte A=A+r+CY A=A+byte+CY r=r-1 A=A-r A=A-byte A=A-r-CY A=A-Byte-CY A=BCD number (A) rp=rp+1 rp=rp-1 HL=HL+rp Effect All but CY All All All All All but CY All All All All All NONE NONE CY
1- Most of the arithmetic instructions affect the contents of an important CPU register; namely the flag register. 2- Most of arithmetic instructions using 8-bit registers are done using the accumulator. 3- The increment or the decrement operations can be performed in any register. 4- For the addition of 8-bit registers, the accumulator is always the 1 st operand, but the addition of 16-bit registers, the HL register pair is always the 1st operand.
University of Technology Laser and Optoelectronics Engineering Department 8085 Microprocessor Lab. 2010-2011
Example Find the summation of register B and register C and put the result in register D, when B=5 and C=3
Lab Work 1. A=(B-C)-(D+E) when BC=0a502h, DE=403h 2. C=(B+20)+(D-30)-1 when B=20h, D=40h 3. HL=BC+DE when BC=2ffh and DE=102h using Instructions use Register Pair
University of Technology Laser and Optoelectronics Engineering Department 8085 Microprocessor Lab. 2010-2011
Home Work Write programs with effects 1. Exchange the content of DE with HL when DE=15ah, HL=8b1ch Instructions use Register Pair. 2. Put the same value (30h) in register H and register L, then subtract 10h from register H and add 10h to register L, after that increment register H by 1 and decrement register L by 1. 3. HL=BC+DE when BC=2ffh and DE=102h using Instructions use 8-bit Registers 4. H=(A-10h)-(C+3ah)+1 when A=5fh, C=10h 5. What is the result of each instruction of the following program and its effect? MVI A,2Fh SUI 20 INR A MVI B,8 ADD B DCR A MVI C,7 SUB C SUI 10 RST1
