Scribd
Upload
26 views1 page

Abstract

The Tiger SHARC processor combines SIMD, VLIW, and short vector memory access techniques, making it one of the most powerful real-time processors. It is an ultra high-performance static superscalar architecture optimized for telecommunications and other demanding applications. This unique architecture combines RISC, VLIW, and DSP elements to natively support 8, 16, and 32-bit fixed and floating-point data types on a single chip with large on-chip memory and high bandwidths.

Uploaded by

Harish Ramesh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
26 views1 page

Abstract

The Tiger SHARC processor combines SIMD, VLIW, and short vector memory access techniques, making it one of the most powerful real-time processors. It is an ultra high-performance static superscalar architecture optimized for telecommunications and other demanding applications. This unique architecture combines RISC, VLIW, and DSP elements to natively support 8, 16, and 32-bit fixed and floating-point data types on a single chip with large on-chip memory and high bandwidths.

Uploaded by

Harish Ramesh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 1

TIGER SHARK

ABSTRACT The Tiger SHARC processor is the newest and one of the most powerful processors which incorporates many mechanisms like SIMD, VLIW and short vector memory access in a single processor. This is the first time that all these techniques have been combined in a real time processor. The Tiger SHARC DSP is an ultra high-performance static superscalar architecture that is optimized for tele-communications infrastructure and other computationally demanding applications. This unique architecture combines elements of RISC, VLIW, and standard DSP processors to provide native support for 8, 16, and 32-bit fixed, as well as floating-point data types on a single chip. Large on-chip memory, extremely high internal and external bandwidths and dual compute blocks provide the necessary capabilities to handle a vast array of computationally demanding, large signal processing tasks.

You might also like