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Assignment N. 6: Analysis of Synchronous and Asynchronous Sequential Networks

This document outlines four assignments analyzing sequential and combinational logic circuits: 1) Analyzing a Johnson counter and its C-phase to B-phase sequence which produces a grey code. 2) Examining a synchronous sequence generator and its output sequence table. 3) Investigating the effects of too high a clock frequency on a synchronous up-counter circuit. 4) Studying an asynchronous up-down counter circuit through its schematic, truth table, and timing diagram showing its cyclic binary down counting behavior.

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119 views4 pages

Assignment N. 6: Analysis of Synchronous and Asynchronous Sequential Networks

This document outlines four assignments analyzing sequential and combinational logic circuits: 1) Analyzing a Johnson counter and its C-phase to B-phase sequence which produces a grey code. 2) Examining a synchronous sequence generator and its output sequence table. 3) Investigating the effects of too high a clock frequency on a synchronous up-counter circuit. 4) Studying an asynchronous up-down counter circuit through its schematic, truth table, and timing diagram showing its cyclic binary down counting behavior.

Uploaded by

vera24m
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd
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Assignment n.

6
Analysis of Synchronous and Asynchronous Sequential Networks <Dorina Veselinova 2IT>

Assignment 6.1: Analysis of a module-4 Johnson counter 00200 1) Schematic

2) Timing diagram

3) C_phase - B_phase sequence: C_phase 0 0 1 1 0 B_phase 0 1 1 0 0

What kind of binary code sequence is it? Grey code. What uses could be appropriate for this circuit? Four phases clock generator.

Assignment 6.2: Analysis of a synchronous sequence generator 00210

1) Schematic

2) Timing diagram

3) Sequence table: D 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 C 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 B 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 A 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

4) What is the function of the circuit? ... counter ... synchronous ... down ... binary ... cyclic ( modulus n as well)

Assignment 6.3: Effects of a too-high clock frequency on a synchronous sequential network 00220 1) Schematic of the mod-4 up-counter:

2) Timing diagram (frequency lower than the maximum allowed)

3) Timing diagram (frequency over the maximum allowed)

Assignment 6.4: Analysis of asynchronous up and down counters 00230 1) Schematic

2) Timing diagram

3) The circuit is ... cyclic, binary, down counter. 4) Truth table of the combinational network: Q2 1 1 1 1 0 0 0 0 Q1 1 1 0 0 1 1 0 0 Q0 1 0 1 0 1 0 1 0 C2 0 0 0 0 1 1 1 1 C1 0 0 1 1 0 0 1 1 C0 0 1 0 1 0 1 0 1 Val 0 1 2 3 4 5 6 7

5) Timing diagram (showing Q2, Q1, Q0, C2, C1, C0 outputs)

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