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Title: Decoder Instruction Aims

The document provides instructions for trainees to examine decoders using various integrated circuits. It describes three decoder circuits - a two to four line decoder using 7404 and 7408 ICs, an eight line decoder using AND gates, and a BCD to decimal decoder using a 74HC42 IC. Trainees are instructed to build each circuit on a breadboard, input switching combinations, and record the output patterns on LEDs or pins to verify the decoder functions as expected according to truth tables provided.

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0% found this document useful (0 votes)
1K views

Title: Decoder Instruction Aims

The document provides instructions for trainees to examine decoders using various integrated circuits. It describes three decoder circuits - a two to four line decoder using 7404 and 7408 ICs, an eight line decoder using AND gates, and a BCD to decimal decoder using a 74HC42 IC. Trainees are instructed to build each circuit on a breadboard, input switching combinations, and record the output patterns on LEDs or pins to verify the decoder functions as expected according to truth tables provided.

Uploaded by

suv_fame
Copyright
© Attribution Non-Commercial (BY-NC)
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Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 4

TITLE: DECODER

INSTRUCTION AIMS:

The trainees must be able to:

1. describe the function of a decoder


2. Design the internal circuit for decoder

TOOL, EQUIPMENTS AND MATERIALS

Breadboard, power supply, IC 7442, 7404, 7408, LED and Jumper Wires

DRAWING DATA TABLE:

Refer to pages with the procedure instructions

GENERAL INSTRUCTION:

Trainees are going to examine the concept of a code converter using decoder and encoder

CONCEPT

A decoder is any circuit or device that detect the presence of unique input states or
condition and yield a unique output for that condition. Each state of the four inputs are
detected and the output yields a high on one of ten lines that corresponds to that
conditions.
PROCEDURE:

Two to four decoder

1. IC 7404 Hex Inverter and Quad 2 –input AND was install in the logic lab
breadboard
2. The circuit was construct as shown.

LED1
U1A
1
3
2

U2A 74LS08N
SW2
1 2
LED2
U1B
74LS04N
4
6
5

74LS08N

LED3
U1C
9
8
U2B 10
SW1
3 4 74LS08N
74LS04N
LED4
U1D
12
11
13

74LS08N

3. data was set as shown in the Two to four Line Decoder Output Table. Outputs for
L1 untul L4 must be record in the table

TWO TO FOUR LINE DECODER TRUTH TABLE


INPUTS OUTPUTS
B= SW2 A= SW1 L1 L2 L3 L4
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

There to Eight Line Decoder


1. Get Eight Triple 3 –input AND gate was insert in traineer and also followed by
three inverter in the logic lab breadboard
2. 3 to 8 decoder was constrcucted in same line as shown figure 2
3. Switch data was set as in the output table. Output indicator must be record of pins
O0-O7

INPUTS OUTPUTS
C B A O0 O1 O2 O3 O4 O5 O6 O7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1

TABLE 2

BCD to decimal decoder


4. one of IC 74HC42 was insert to decimal decoder into the logic lab breadboard
5. Data was set up as switch as in the BCD to decimal decoder outputs table.
Outputs must be record indicator of pin 1-7 and 9-11

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