Memory Interfacing: Sreepada Ravikumar
Memory Interfacing: Sreepada Ravikumar
Sreepada Ravikumar
1. Design a memory interface with 8086 for the following specifications. Two 4KB SRAMs Two 4KB EPROMS Two 4KB EEPROMS ( Nov/Dec 2008 ) Solution: Given chips are a. Two 4KB SRAMs b. Two 4KB EPROMS c. Two 4KB EEPROMS
The 8086 can address 1MB of memory (00000H-FFFFFH). Memory is organized into even and odd address range. a. Address range of Two 4KB SRAMS: Let the starting address of SRAMS = 00000H Ending address is = 00000H + 2 X 4 X (1024)D = 00000H + 2 X 4 X (400)H = 02000H 1 because address started at 00000H
= 01FFFH So address range of even SRAM = 00000H-01FFEH Address range of odd SRAM = 00001H-01FFFH
b. Address range of Two 4KB EPROMS: Let the starting address of EPROMS = FC000H Ending address is = FC000H + 2 X 4 X (1024)D = FC000H + 2 X 4 X (400)H =FE000H 1 because address started at FC000H = FDFFFH So address range of even EPROM = FC000H-FDFFEH Address range of odd EPROM = FC001H-FDFFFH
c. Address range of Two 4KB EEPROMS: Let the starting address of EEPROMS = FE000H Ending address is = FE000H + 2 X 4 X (1024)D = FE000H + 2 X 4 X (400)H = 10000H 1 because address started at 00000H = FFFFFH
So address range of even EEPROM = FE000H-FFFFEH Address range of odd EEPROM = FE001H-FFFFFH
The following table illustrates binary generation for each of the above addresses. Also chip select signals are derived from the available unique signals on A19, A13 and A0
Chip Odd EEPROM Even EEPROM Odd EPROM Even EPROM Odd SRAM Even SRAM Address FFFFF FE001 FFFFE FE000 FDFFF FC001 FDFFE FC000 01FFF 00001 01FFE 00000 A19 1 1 1 1 1 1 1 A18 1 1 1 1 1 1 1 A17 1 1 1 1 1 1 1 A16 1 1 1 1 1 1 1 A15 1 1 1 1 1 1 A14 1 1 1 1 1 1 A13 1 1 1 1 0 0 A12 1 0 1 0 1 0 A11 1 0 1 0 1 0 A10 1 0 1 0 1 0 A9 1 0 1 0 1 0 A8 1 0 1 0 1 0 A7 1 0 1 0 1 0 A6 1 0 1 0 1 0 A5 1 0 1 0 1 0 A4 1 0 1 0 1 0 A3 1 0 1 0 1 0 A2 1 0 1 0 1 0 A1 1 0 1 0 1 0 A0 1 1 0 0 1 1