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    Dethi KTSo Final Draft 09dtvt

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    Nguyen Khanh
    This document contains the instructions for an exam with 8 questions covering various topics in digital logic design and computer architecture. Question 1 involves performing arithmetic operations in sign-magnitude format. Question 2 involves converting decimal numbers to base 5 and performing operations. Question 3 involves reducing a logical expression and using a truth table. Question 4 involves minimizing a logic function and implementing it with NAND gates. Question 5 involves finding a reduced logic expression for a circuit and implementing it with NOR gates. Question 6 involves drawing waveforms for flip-flops in a circuit. Question 7 involves developing the state diagram, table, and logic diagram for a combination lock circuit. Question 8 involves identifying elements of the von Neumann architecture, comparing it to the Harvard architecture, and

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    Dethi KTSo Final Draft 09dtvt

    Uploaded by

    Nguyen Khanh
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    This document contains the instructions for an exam with 8 questions covering various topics in digital logic design and computer architecture. Question 1 involves performing arithmetic operations in sign-magnitude format. Question 2 involves converting decimal numbers to base 5 and performing operations. Question 3 involves reducing a logical expression and using a truth table. Question 4 involves minimizing a logic function and implementing it with NAND gates. Question 5 involves finding a reduced logic expression for a circuit and implementing it with NOR gates. Question 6 involves drawing waveforms for flip-flops in a circuit. Question 7 involves developing the state diagram, table, and logic diagram for a combination lock circuit. Question 8 involves identifying elements of the von Neumann architecture, comparing it to the Harvard architecture, and

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    This document contains the instructions for an exam with 8 questions covering various topics in digital logic design and computer architecture. Question 1 involves performing arithmetic operations in sign-magnitude format. Question 2 involves converting decimal numbers to base 5 and performing operations. Question 3 involves reducing a logical expression and using a truth table. Question 4 involves minimizing a logic function and implementing it with NAND gates. Question 5 involves finding a reduced logic expression for a circuit and implementing it with NOR gates. Question 6 involves drawing waveforms for flip-flops in a circuit. Question 7 involves developing the state diagram, table, and logic diagram for a combination lock circuit. Question 8 involves identifying elements of the von Neumann architecture, comparing it to the Harvard architecture, and

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    5 views2 pages

    Dethi KTSo Final Draft 09dtvt

    Uploaded by

    Nguyen Khanh
    This document contains the instructions for an exam with 8 questions covering various topics in digital logic design and computer architecture. Question 1 involves performing arithmetic operations in sign-magnitude format. Question 2 involves converting decimal numbers to base 5 and performing operations. Question 3 involves reducing a logical expression and using a truth table. Question 4 involves minimizing a logic function and implementing it with NAND gates. Question 5 involves finding a reduced logic expression for a circuit and implementing it with NOR gates. Question 6 involves drawing waveforms for flip-flops in a circuit. Question 7 involves developing the state diagram, table, and logic diagram for a combination lock circuit. Question 8 involves identifying elements of the von Neumann architecture, comparing it to the Harvard architecture, and

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    Final Exam

    EE 271
    Danang University of Technology - University of Washington Advanced Program in Electronic and Communication Engineering

    Winter 2009

    1. (10) Please perform the following arithmetic operations. The numbers are represented in sign and magnitude format with the MSB (most significant bit) as the sign bit. Use 2s complement arithmetic when necessary. a. 0 1 1 0 0 1 - 100110 b. 1 1 1 1 0 0 1 + 0011001 c. 1 0 0 1 1 1 0 + 1101010 d. 0 1 0 1 1 0 1 - 0010010

    2. (10) Please convert the each of the following decimal numbers to base 5 and perform the indicated operations. a. -25 - -37 b. 33 + -14 c. 21 - -78

    3. (10) For the logical expression F ABC BC AC ABC a. Please reduce the expression to its simplest form b. Use a truth table to show the two forms (reduced and unreduced) are equivalent. c. Give the maxtern representation of F. 4. (10) For the following, Z = m0, m5, m10, m15 Dont cares = m2, m7, m8, m13 a. Minimize the associated logic function as much as possible. b. Implement the reduced logic function using NAND gates only.

    5. (10) For the following circuit, a. Please find the reduced logic expression for Z. b. Implement the reduced logic function, Z, using only NOR gates.
    A B C D

    6. (10) For the following circuit,


    J Q

    QA
    S Q

    QB
    D Q

    QC

    Clock

    Please draw the wave forms that will appear on the Q output of each flip flop.

    QC QB QA

    7. (30) We have a combination lock that requires the 4 digit sequence 3 1 1 2 to open. NOTE: This is a design problemyou must state any assumptions you are making. For the system, please develop the following: a. Identify the Inputs b. Identify the Outputs c. The state diagram d. The state table e. The output table f. The state assignment g. The transition table h. Specify the minimum number of flip flops and explain why your answer is correct. i. Give a logic diagram for the circuit using J K, negative edge triggered flip flops. 8. (10) a. Identify and describe the function of the major elements of a von Neumann computer architecture. Please be specific and precise. b. Please explain how the von Neuman architecture differs from the Harvard architecture. Please be specific and precise. c. Please give one advantage and one disadvantage of the Harvard architecture when compared with the von Neumann architecture.

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