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Ch2 Hardware Fundamentals Lecture

This document discusses hardware fundamentals for embedded systems. It defines common chip packaging types and circuit board components. Key concepts covered include voltage levels, input and output signaling, basic logic gates, memory types, and timing considerations. Clocks and their timing requirements for coordinating components are also explained.

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0% found this document useful (0 votes)
122 views

Ch2 Hardware Fundamentals Lecture

This document discusses hardware fundamentals for embedded systems. It defines common chip packaging types and circuit board components. Key concepts covered include voltage levels, input and output signaling, basic logic gates, memory types, and timing considerations. Clocks and their timing requirements for coordinating components are also explained.

Uploaded by

api-3838221
Copyright
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Hardware Fundamentals

Simon Chapter 2

David E. Simon, An Embedded Software Primer


Terminology
„ Chips, pins, circuit boards
„ Packages
„ DIP: Dual Inline Package
„ PLCC: Plastic Leaded/Leadless Chip Carrier
„ TSOP: Thin Small Outline Package
„ PQFP: Plastic Quad Flat Pack
„ BGA: Ball Grid Array
„ PGA: Pin Grid Array

www.computerhope.com/jargon/d/dip.htm
Embedded
Circuit
Boards

Sparkfun, TI eZ430
Terminology
„ Ground, Low
„ High, VCC
„ Actually – within a volt or so of the “rails”
„ Assertions (negative vs positive)
„ Address lines (A0, A1, A2, etc.)
„ Data lines (D0, D1, D2, etc.)
„ * or /
„ Inputs and outputs...driving the signal
„ Bus fight – two outputs driving different ways
Gates and Boolean Logic

http://www.ibiblio.org/obp/electricCircuits/Digital/DIGI_3.html
More Gate Logic

(Book example)
http://www.ibiblio.org/obp/electricCircuits/Digital/DIGI_3.html
Other Considerations
„ Power surges and
decoupling capacitors

„ Open Collector Outputs


„ Driving one output with
several devices
„ Output: low or float
„ Pull-up resistor
„ No bus fights
Tri State Devices
„ Three states
„ Hi
„ Lo
„ Hi Impedence
„ Data Paths
„ Overloading
Timing Diagrams
„ NAND Gate

Input 1
Output
Input 2
D Flip Flops: 1-bit Memory
„ Operation
„ Rising or Falling Edge Triggered
„ Q = D at clocks rising edge
„ All other times, Q holds existing value

„ Hold time and Setup Time


„ (do plot)
Clocks
„ Oscillators and Crystals
„ Timing requirements of components
„ Multiple clocks (sleep, Xmit)
„ Often integer multiples of data rates
Memory: RAM and ROM
„ ROM: Read Only Memory
„ Nonvolatile – data maintained after power off
„ Where programs and some data stored
„ ROM Variants
„ PROM: Programmable ROM (used once)
„ EPROM: Erasable Programmable ROM (erased with UV)
„ FLASH: (rewritten by programming)
„ EEPROM: Electronically-erasable ROM (erased electronically,
very slow)
„ RAM
„ Extremely fast
„ Data lost when power off
Address and Data Lines

(Timing Diagram)

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