Division
1. Align dividend and divisor with their most signicant digits 2. test how many times n the divisor ts into the locally aligned dividend 3. n is the value of the quotient digit 4. subtract divisor n times from the locally aligned dividend 5. extend local remainder by the next less signicant digit of the dividend, thus forming a new local dividend 6. repeat steps 2. 5. until all digits of the dividend are considered 7. the local remainder after the last subtraction is the remainder of the division
Example (decimal):
1 1 9 1 3 6 6
195 13 = 15
Example (binary):
19 6 = 3 rem 1
Divisior 1 3
5 5 5 5 0
Quotient Dividend 6 110
1 0 1
Remainder
0 0 0 1 0
0 0 0 0 1 1 1 0
1 1 1 1 1 0 1 1 1 0 0 1
3 19
243
244
245
Sequential Restoring Division
A shift register keeps both the (remaining) dividend as well as the quotient with each cycle, dividend decreases by one digit & quotient increases by one digit the MSBs of the remaining dividend and the divisor are aligned in each cycle major difference to multiplication: 1. we do not know if we can subtract the divisor or not 2. if the subtraction failed, we have to restore the original dividend
Sequential Restoring Division
1. Load the 2n dividend into both halves of shift register, and add a sign bit to the left 2. add a sign bit to the left of the divisor 3. generate the 2s complement of the divisor 4. shift to the left 5. add 2s complement of the divisor to the upper half of the shift register including sign bit (subtract) 6. if sign of the result is cleared (positive) then set LSB of the lower half of the shift register to one else clear LSB of the lower half and add the divisor to upper half of shift register (restore) 7. repeat from 4. and perform the loop n times 8. after termination: lower half of shift register quotient upper half of shift register remainder
Sign
78
0 1 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 0 1 0 1 1 1 0 0 0 0 1 0 1 1 1 1 1 0 1 0 0 1 1 1 0 0
ADD
6 = 13
0 1 0 0 1 0 0 0 0 1 0 0 0 0
Divisor 2s Complement
1 1
1 1 1 0 0 1 1
1 0 0
Set 1
0
Shift Left
Dividend
0 1
(Remainder) | (Quotient) SUB
Test = 0 (positive)
Shift Left
1 1
Set 1
0
SUB
1
Shift Left
Test = 0 (positive)
1 1
Set 0
0
SUB
Test = 1 (negative)
Restore
0 1 1
1 1 1
1 0 0
Set 1
0
Shift Left
0
SUB
1
DONE
Test = 0 (positive)
246 247 248
Division Overow
Sign
78 3 = 26
Non-Restoring Division
Restoring: Each time subtraction fails, 1. the divisor is added 2. the dividend is shifted left 3. the divisor is subtracted the result equals 2(d + v) v
Sign
78
0 1 0 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 0 0 1 0 1 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 0 0 0 0 1 0 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0
Set 1
251
6 = 13
(non-restoring)
Divisor 2s Complement
0 1 0 0 1 0
0 1 0 1 1 0
0 1 1 0 1 1
1 0 0 0 0 1
1 1 0 1 1 0
1
Divisor 2s Complement
0 0 1 0 0 0 0 1 1 0 0 0
1 1 1 1 1 0 0 1
1 1 1 0 0 1 1 1
1 0 0
Set 1
0
Shift Left
Dividend
1 1 1
1 1 1
1 0 0
Set 1
0
Shift Left
0
SUB
Dividend
0
SUB
1
Shift Left
Test = 0 (positive)
1
Shift Left
Test = 0 (positive)
v can be added after shifting, thus replacing the subtraction in the next cycle this equals 2d + v
1 1
Set 1
0
SUB
1
Shift Left
Test = 0 (positive)
(remainder) > 0011 (divisor)
1 1
Set 0
0
SUB
OVERFLOW!
both variants deliver identical results, but non-restoring saves one subtraction step!
0
Shift Left
Test = 1 (negative)
0
ADD
An overow occurs if any n-bit remainder is greater or equal to the n-bit divisor
0 1
DONE
Test = 0 (positive)
249 250
Combinational Network
v3 v2 0 v1 0 v0 0
Divisor (4 bit) Dividend (8 bit, extended to 12 bit)
Combinational Network
Compare and Subtract if Greater (or equal!)
Local Dividend (5 MSBs) Divisor
Conclusions for Division
A sequential division can be implemented with the same hardware as used for sequential multiplication however, less potential for optimization non-restoring division better performance
d7
d6
d5
d4
d3
d2
d1
d0
Compare and Subtract if Greater
Compare and Subtract if Greater
0
Compare and Subtract if Greater
Compare and Subtract if Greater
5-bit subtractor
Compare and Subtract if Greater
1
Compare and Subtract if Greater
Compare and Subtract if Greater
division overow: 1. an n-bit n-bit multiplication always ts into a 2n-bit result 2. a division of 2n-bit by n-bit may not be representable in n bits
Compare and Subtract if Greater
q7
q6
q5
q4
q3
q2
q1
q0
r3
r2
r1
r0
Quotient-bit
Remainder
Quotient (8 bit)
Remainder (4 bit)
252
253
254
