Scribd
Upload
39 views1 page

Hyper Transport Technology

The document discusses HyperTransport technology, which is a narrow, high-speed, low-power I/O bus designed for embedded systems, desktops, servers, and networking. HyperTransport technology provides fast signaling up to 800MHz and throughput of 1.6 gigatransfers per pin-pair on a 32-bit link, for a maximum of 12.8 gigabytes per second. It maintains software and operating system compatibility with PCI while using point-to-point links to transfer data faster than a shared bus architecture.

Uploaded by

Sowmya_Reddy_5407
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
39 views1 page

Hyper Transport Technology

The document discusses HyperTransport technology, which is a narrow, high-speed, low-power I/O bus designed for embedded systems, desktops, servers, and networking. HyperTransport technology provides fast signaling up to 800MHz and throughput of 1.6 gigatransfers per pin-pair on a 32-bit link, for a maximum of 12.8 gigabytes per second. It maintains software and operating system compatibility with PCI while using point-to-point links to transfer data faster than a shared bus architecture.

Uploaded by

Sowmya_Reddy_5407
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 1

HYPERTRANSPORT TECHNOLOGY

Abstract:
Designing an I/O bus requires more than a protocol deIinition and electrical interIace
speciIication. While these are two very important aspects oI any bus architecture, other issues
must also be addressed, such as system design considerations. In the past, a bus had to be made
wider Ior higher perIormance through higher bandwidth. But the ever-shrinking desktop and
server Iorm Iactors required by IT and consumer markets have made this design methodology
both unrealistic and expensive, both in terms oI actual costs and power consumption.
The HyperTransport technology I/O link is a narrow, high speed, low power I/O bus that
has been designed to meet the requirements oI the embedded markets, the desktop, workstation,
and server markets, and networking and communications markets. HyperTransport technology
links are capable oI extremely Iast signaling with clock speeds oI up to 800MHz,and Double
Data Rate (DDR) memory signaling, to provide an eIIective throughput oI 1.6 giga transIers per
pin-pair on a 32-bit link. The result is a maximum aggregate throughput oI 12.8 gigabytes per
second, per link. HyperTransport technology provides high speeds while maintaining Iull
soItware and operating system compatibility with the Peripheral Component Interconnect (PCI)
interIace that is used in most systems today. HyperTransport technology uses a point-to-point
link that is connected between two devices, enabling the overall speed oI the link to transIer data
much Iaster. This also means that HyperTransport technology does not suIIer Irom the overhead
imposed by bus arbitration where resources need to be allocated inside oI a shared bus. The true
strength oI HyperTransport technology is the ease at which system designers can integrate the
technology into new and existing architectures. HyperTransport technology removes many oI the
constraints that impede high bandwidth, low latency bus architectures, while oIIering advanced
capabilities at the same time.
This paper Iocuses on the beneIits that HyperTransport technology gives system designers
and the advanced capabilities that HyperTransport technology oIIers.
By,
N.Sowmya (10011D5511)
M.Tech Embedded Systems

You might also like