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Lec04 Threads

The document discusses thread dispatching and summarizes key points about threads and processes. Threads represent concurrency within a process and encapsulate execution, while address spaces encapsulate memory protection. Thread control blocks are used to track thread state and execution context. Threads can be dispatched concurrently to leverage multiple CPUs.

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0% found this document useful (0 votes)
96 views30 pages

Lec04 Threads

The document discusses thread dispatching and summarizes key points about threads and processes. Threads represent concurrency within a process and encapsulate execution, while address spaces encapsulate memory protection. Thread control blocks are used to track thread state and execution context. Threads can be dispatched concurrently to leverage multiple CPUs.

Uploaded by

api-3761983
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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CS162

Operating Systems and


Systems Programming
Lecture 4

Thread Dispatching

January 30, 2006


Prof. Anthony D. Joseph
http://inst.eecs.berkeley.edu/~cs162
Recall: Modern Process with Multiple Threads

• Process: Operating system abstraction to represent


what is needed to run a single, multithreaded
program
• Two parts:
– Multiple Threads
» Each thread is a single, sequential stream of execution
– Protected Resources:
» Main Memory State (contents of Address Space)
» I/O state (i.e. file descriptors)
• Why separate the concept of a thread from that of
a process?
– Discuss the “thread” part of a process (concurrency)
– Separate from the “address space” (Protection)
– Heavyweight Process ≡ Process with one thread

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.2


Recall: Single and Multithreaded Processes

• Threads encapsulate concurrency


– “Active” component of a process
• Address spaces encapsulate protection
– Keeps buggy program from trashing the system
– “Passive” component of a process
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.3
Recall: Classification

# of addr
spaces:
One Many
# threads
Per AS:

MS/DOS, early
One Traditional UNIX
Macintosh
Embedded systems Mach, OS/2, Linux,
(Geoworks, VxWorks, Win 95?, Mac OS X,
Many JavaOS,etc)
Win NT to XP, Solaris,
JavaOS, Pilot(PC) HP-UX
• Real operating systems have either
– One or many address spaces
– One or many threads per address space
• Did Windows 95/98/ME have real memory protection?
– No: Users could overwrite process tables/System DLLs
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.4
Goals for Today

• Further Understanding Threads


• Thread Dispatching
• Beginnings of Thread Scheduling

Note: Some slides and/or pictures in the following are


adapted from slides ©2005 Silberschatz, Galvin, and Gagne.
Gagne
Many slides generated from my lecture notes by Kubiatowicz.
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.5
Recall: Execution Stack Example

A: tmp=1
A(int tmp) { ret=exit
if (tmp<2)
B: ret=A+2
B();
printf(tmp); C: ret=b+1

} A: tmp=2
B() { Stack ret=C+1
Pointer
C();
} Stack Growth

C() {
• Stack holds temporary results
A(2);
• Permits recursive execution
}
• Crucial to modern languages
A(1);

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.6


MIPS: Software conventions for
0 zero constant 0
Registers
16 s0 callee saves
1 at reserved for assembler . . . (callee must save)
2 v0 expression evaluation & 23 s7
3 v1 function results 24 t8 temporary (cont’d)
4 a0 arguments 25 t9
5 a1 26 k0 reserved for OS kernel
6 a2 27 k1
7 a3 28 gp Pointer to global area
8 t0 temporary: caller saves 29 sp Stack pointer
... (callee can clobber) 30 fp frame pointer
15 t7 31 ra Return Address (HW)

• Before calling procedure: • After return, assume


– Save caller-saves regs – Callee-saves reg OK
– Save v0, v1 – gp,sp,fp OK (restored!)
– Save ra – Other things trashed
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.7
Single-Threaded Example

• Imagine the following C program:

main() {
ComputePI(“pi.txt”);
PrintClassList(“clist.text”);
}

• What is the behavior here?


– Program would never print out class list
– Why? ComputePI would never finish

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.8


Use of Threads
• Version of program with Threads:

main() {
CreateThread(ComputePI(“pi.txt”));
CreateThread(PrintClassList(“clist.text”));
}

• What does “CreateThread” do?


– Start independent thread running given procedure
• What is the behavior here?
– Now, you would actually see the class list
– This should behave as if there are two separate CPUs
CPU1 CPU2 CPU1 CPU2 CPU1 CPU2

Time
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.9
Memory Footprint of Two-Thread Example

• If we stopped this program and examined it with a


debugger, we would see
– Two sets of CPU registers Stack 1
– Two sets of Stacks
• Questions:
– How do we position stacks relative to

Address Space
Stack 2
each other?
– What maximum size should we choose
for the stacks?
– What happens if threads violate this? Heap
– How might you catch violations?
Global Data

Code

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.10


Per Thread State

• Each Thread has a Thread Control Block (TCB)


– Execution State: CPU registers, program counter,
pointer to stack
– Scheduling info: State (more later), priority, CPU time
– Accounting Info
– Various Pointers (for implementing scheduling queues)
– Pointer to enclosing process? (PCB)?
– Etc (add stuff as you find a need)
• In Nachos: “Thread” is a class that includes the TCB
• OS Keeps track of TCBs in protected memory
– In Array, or Linked List, or …

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.11


Lifecycle of a Thread (or Process)

• As a thread executes, it changes state:


– new: The thread is being created
– ready: The thread is waiting to run
– running: Instructions are being executed
– waiting: Thread waiting for some event to occur
– terminated: The thread has finished execution
• “Active” threads are represented by their TCBs
– TCBs organized into queues based on their state
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.12
Ready Queue And Various I/O Device Queues
• Thread not running ⇒ TCB is in some scheduler queue
– Separate queue for each device/signal/condition
– Each queue can have a different scheduler policy
Ready Head Link Link Link
Queue Tail Registers Registers Registers
Other Other Other
Head State State State
Tape
TCB9 TCB6 TCB16
Unit 0 Tail

Disk Head Link Link


Unit 0 Tail Registers Registers
Other Other
Disk Head State State
Unit 2 TCB2 TCB3
Tail
Link
Ether Head
Netwk 0 Registers
Tail Other
State
TCB8
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.13
Administrivia

• Audio Podcasts are now available


– RSS, stream, MP3 downloads
• Group assignments now posted on website
– Check out the “Group/Section Assignment” link
– Please attend your newly assigned section
Section Time Location TA
101 Tu 9:00-10:00P 2062 VLSB Dennis
102 Tu 10:00-11:00A 3111 Etcheverry Dennis
103 Tu 11:00-12:00P 3113 Etcheverry Chris
104 Tu 12:00-1:00P 3113 Etcheverry John
105 Tu 2:00-3:00P 71 Evans Hall John
Cory Hall (Hogan Rm)
106 Tu 2:00-3:00P Chris
(2/7 is in Woz)
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.14
Administrivia

• Time to start Project 1 [CVS poll]


– Go to Nachos page: start reading tasks and Nachos code
– Java 1.5 now supported (let us know about bugs…)
• Nachos readers:
– Will be available from Copy Central later this week
– Includes lectures and printouts of all of the code
• Warning: you will be prompted for a passphrase
– We need to autogenerate ssh keys for you
– When prompted for a pass phrase, don’t forget it!
– This is needed for group collaboration tools
• Not everyone has run the register program!
– This should happen automatically when you login, but you
need to avoid hitting control-C
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.15
Dispatch Loop

• Conceptually, the dispatching loop of the operating system


looks as follows:

Loop {
RunThread();
ChooseNextThread();
SaveStateOfCPU(curTCB);
LoadStateOfCPU(newTCB);
}

• This is an infinite loop


– One could argue that this is all that the OS does
• Should we ever exit this loop???
– When would that be?

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.16


Running a thread

Consider first portion: RunThread()

• How do I run a thread?


– Load its state (registers, PC, stack pointer) into CPU
– Load environment (virtual memory space, etc)
– Jump to the PC

• How does the dispatcher get control back?


– Internal events: thread returns control voluntarily
– External events: thread gets preempted

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.17


Internal Events

• Blocking on I/O
– The act of requesting I/O implicitly yields the CPU
• Waiting on a “signal” from other thread
– Thread asks to wait and thus yields the CPU
• Thread executes a yield()
– Thread volunteers to give up CPU

computePI() {
while(TRUE) {
ComputeNextDigit();
yield();
}
}
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.18
Stack for Yielding Thread
ComputePI

Stack growth
yield
Trap to OS
kernel_yield
run_new_thread
switch

• How do we run a new thread?


run_new_thread() {
newThread = PickNewThread();
switch(curThread, newThread);
ThreadHouseKeeping(); /* next Lecture */
}
• How does dispatcher switch to a new thread?
– Save anything next thread may trash: PC, regs, stack
– Maintain isolation for each thread
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.19
What do the stacks look like?

• Consider the following


code blocks:
proc A() { Thread S Thread T

B(); A A

Stack growth
} B(while) B(while)
proc B() { yield yield
while(TRUE) {
yield(); run_new_thread run_new_thread

} switch switch
}
• Suppose we have 2
threads:
– Threads S and T

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.20


Saving/Restoring state (often called “Context Switch)
Switch(tCur,tNew) {
/* Unload old thread */
TCB[tCur].regs.r7 = CPU.r7;

TCB[tCur].regs.r0 = CPU.r0;
TCB[tCur].regs.sp = CPU.sp;
TCB[tCur].regs.retpc = CPU.retpc; /*return addr*/

/* Load and execute new thread */


CPU.r7 = TCB[tNew].regs.r7;

CPU.r0 = TCB[tNew].regs.r0;
CPU.sp = TCB[tNew].regs.sp;
CPU.retpc = TCB[tNew].regs.retpc;
return; /* Return to CPU.retpc */
}
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.21
Switch Details
• How many registers need to be saved/restored?
– MIPS 4k: 32 Int(32b), 32 Float(32b)
– Pentium: 14 Int(32b), 8 Float(80b), 8 SSE(128b),…
– Sparc(v7): 8 Regs(32b), 16 Int regs (32b) * 8 windows =
136 (32b)+32 Float (32b)
– Itanium: 128 Int (64b), 128 Float (82b), 19 Other(64b)
• retpc is where the return should jump to.
– In reality, this is implemented as a jump
• There is a real implementation of switch in Nachos.
– See switch.s
» Normally, switch is implemented as assembly!
– Of course, it’s magical!
– But you should be able to follow it!

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.22


Switch Details (continued)
• What if you make a mistake in implementing switch?
– Suppose you forget to save/restore register 4
– Get intermittent failures depending on when context switch
occurred and whether new thread uses register 4
– System will give wrong result without warning
• Can you devise an exhaustive test to test switch code?
– No! Too many combinations and inter-leavings
• Cautionary tail:
– For speed, Topaz kernel saved one instruction in switch()
– Carefully documented!
» Only works As long as kernel size < 1MB
– What happened?
» Time passed, People forgot
» Later, they added features to kernel (no one removes
features!)
» Very weird behavior started happening
– Moral of story: Design for simplicity
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.23
BREAK
What happens when thread blocks on I/O?

CopyFile

Stack growth
read
Trap to OS
kernel_read
run_new_thread
switch

• What happens when a thread requests a block of


data from the file system?
– User code invokes a system call
– Read operation is initiated
– Run new thread/switch
• Thread communication similar
– Wait for Signal/Join
– Networking
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.25
External Events

• What happens if thread never does any I/O,


never waits, and never yields control?
– Could the ComputePI program grab all resources
and never release the processor?
» What if it didn’t print to console?
– Must find way that dispatcher can regain control!
• Answer: Utilize External Events
– Interrupts: signals from hardware or software
that stop the running code and jump to kernel
– Timer: like an alarm clock that goes off every
some many milliseconds
• If we make sure that external events occur
frequently enough, can ensure dispatcher runs

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.26


Example: Network Interrupt
Raise priority
s
d nt eReenable All Ints
… e
v l I od
a
s Al M Save registers
External Interrupt

add $r1,$r2,$r3 C
P le or Dispatch to Handler

“Interrupt Handler”
subi $r4,$r1,#4
a b i s …
is r v
D pe
slli $r4,$r4,#2
Su
Transfer Network
Packet from hardware
Pipeline Flush
to Kernel Buffers
lw $r2,0($r4) …

Re er
lw $r3,4($r4)
Us
st M
Restore registers

or o d
add $r2,$r2,$r3
Clear current Int
e
sw 8($r4),$r2

PC
… Disable All Ints
e Restore priority
RTI
• An interrupt is a hardware-invoked context switch
– No separate step to choose what to run next
– Always run the interrupt handler immediately
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.27
Use of Timer Interrupt to Return Control

• Solution to our dispatcher problem


– Use the timer interrupt to force scheduling decisions

Stack growth
Some Routine
Interrupt
TimerInterrupt
run_new_thread
switch

• Timer Interrupt routine:


TimerInterrupt() {
DoPeriodicHouseKeeping();
run_new_thread();
}
• I/O interrupt: same as timer interrupt except that
DoHousekeeping() replaced by ServiceIO().
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.28
Choosing a Thread to Run
• How does Dispatcher decide what to run?
– Zero ready threads – dispatcher loops
» Alternative is to create an “idle thread”
» Can put machine into low-power mode
– Exactly one ready thread – easy
– More than one ready thread: use scheduling priorities
• Possible priorities:
– LIFO (last in, first out):
» put ready threads on front of list, remove from front
– Pick one at random
– FIFO (first in, first out):
» Put ready threads on back of list, pull them from front
» This is fair and is what Nachos does
– Priority queue:
1/30/06
» keep ready list sorted by TCB priority field
Joseph CS162 ©UCB Spring 2006 Lec 4.29
Summary
• The state of a thread is contained in the TCB
– Registers, PC, stack pointer
– States: New, Ready, Running, Waiting, or Terminated
• Multithreading provides simple illusion of multiple CPUs
– Switch registers and stack to dispatch new thread
– Provide mechanism to ensure dispatcher regains control
• Switch routine
– Can be very expensive if many registers
– Must be very carefully constructed!
• Many scheduling options
– Decision of which thread to run complex enough for
complete lecture

1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.30

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