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Decoder

The document discusses decoders and demultiplexers. It describes their basic functionality and how they work, including examples of 1:2, 2:4, and 3:8 decoders. It also covers alternative implementations and using decoders as logic building blocks to generate minterms. Finally, it discusses multiplexers and shows examples of combining decoders with multiplexers.

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Ashish Vinodrao Saywan
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© Attribution Non-Commercial (BY-NC)
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Download as PPT, PDF, TXT or read online on Scribd
36 views

Decoder

The document discusses decoders and demultiplexers. It describes their basic functionality and how they work, including examples of 1:2, 2:4, and 3:8 decoders. It also covers alternative implementations and using decoders as logic building blocks to generate minterms. Finally, it discusses multiplexers and shows examples of combining decoders with multiplexers.

Uploaded by

Ashish Vinodrao Saywan
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Decoders/DeMUXs

CS370 Spring 2003

Decoders/Demultiplexers
Decoder: single data input, n control inputs, 2 n outputs control inputs (called select S) represent Binary index of output to which the input is connected data input usually called "enable" (G) 3:8 Decoder: 1:2 Decoder: O0 = G y S; O1 = G y S 2:4 Decoder: O0 = G y S0 y S1 O1 = G y S0 y S1 O2 = G y S0 y S1 O3 = G y S0 y S1 O0 = G yS0 y S1 y S2 O1 = G yS0 yS1 y S2 O2 = G yS0 y S1 y S2 O3 = G y S0 y S1 y S2 O4 = G y S0 y S1y S2 O5 = G y S0 y S1y S2 O6 = G y S0 y S1y S2 O7 = G y S0 y S1y S2

Decoders/Demultiplexers
Alternative Implementations
G Select
/G Output0 Select Output0 Output1

Output1

1:2 Decoder, Active High Enable


G Output0 Output1 Output2 Output3

1:2 Decoder, Active Low Enable


/G Output0 Output1 Output2 Output3

Select0

Select1

Select0

Select1

2:4 Decoder, Active High Enable

2:4 Decoder, Active Low Enable

Decoder/Demultiplexer
Decoder as a Logic Building Block
0 1 2 3 4 5 6 7 ABC ABC ABC ABC ABC ABC ABC ABC

Enb 3:8 dec

Decoder Generates Appropriate Minterm based on Control Signals If Enb = 0, no outputs are generates. If Enb = 1, the Decoder is active.

S2 A

S1 B

S0 C

Example Function: F1 = A' B C' D + A' B' C D + A B C D F2 = A B C' D' + A B C F3 = (A' + B' + C' + D')

Decoder/Demultiplexer
Decoder as a Logic Building Block
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD F1

Enb

4:16 dec

F2

S3 S2 S1 S0 A B C D

F3

If active low enable, then use NAND gates!

Multiplexers/Decoders
Alternative Implementations of 32:1 Mux
EN I31 7 151 EN 1 6 5 Y5 1 4 I23 7 151 41 6 5 3 W 6 EN 1 5 2 2 1 4 31Y 5 I15 7 151 41 1 3 40 EN 1 6 52 2 9 W 6 3 5 3 Y 5C 14 7 151 1 1 B 4 6 51 3 4 0W 1 6 A 5 22 9C 0 3 1 Y 15 B 1 4 13 4 0 1 6 A 2 9 CW 0 1 1 1B 0 1A S2 0 1 S1 S0

I7 I6 I5 I4 I3 I2 I1 I0 C D E

1 GA 3 A3 4 A2 5 A1 6 A0

1 1G 1Y3 1391Y2 A 3 1B 1Y1 2 1A 1Y0 B 15 2G 2Y3 2Y2 13 2B 2Y1 14 2A 2Y0

7 6 5 4 9 10 11 12 7 I7 I6 I5 I4 I3 I2 I1 I0 C D E

153
Y A 7 F(A, B, C, D, E)

13 B3 12 B2 11 B1 Y B 9 10 B0 1 GBS1SO 5 2 14 A B

7 EN 146 5 154 I31 7 151 1 7 EN 146 2 3 2 I5 5 154 I23 7 I4151 3 1 Y 5 40 7 EN 146 I3 1 3 6 I5 5 I2 2 2 9 CW 154 I1 5 I15 7 I4151 3 1 Y 10B 6 I3 13 I0 4 0 W 11A EN 145 I2 22 9 S2 6 I5 C C 154 I1 5 S1 7 I4151 31Y 10B 1 3 I0 40 D 11A 6 I3 W 6 S2 5 I2 2 2 C 9C E S0 5 4 I1 3 1 Y 10B D S1 3 I0 4 0 W11A 6 2 C 9 C E S0 S2 1 10B S1 0 D 11A S2 S0 E S1 S0

F(A, B, C, D, E)

Multiplexer Only

Multiplexer + Decoder

Multiplexers/Decoders
5:32 Decoder
\EN S4 S3 1G 1Y 3 139 1Y 2 1B 1Y 1 1A 1Y 0 2G 2Y 3 2Y 2 2B 2Y 1 2A 2Y 0 S2 S1 S0 G1 G2A G2B Y7 Y6 Y5 Y4 138 Y 3 Y2 C Y1 B Y0 A \Y 31 \Y 30 \Y 29 \Y 28 \Y 27 \Y 26 \Y 25 \Y 24

\EN 5:32 s s

\Y31 . . .

S2 S1 S0

Y7 G1 G2A Y 6 G2B Y 5 138 Y 4 Y3 Y2 C Y1 B Y0 A

\Y 23 \Y 22 \Y 21 \Y 20 \Y 19 \Y 18 \Y 17 \Y 16

\Y0 S4 S3 S2 S1 S0

S2 S1 S0

G1 Y 7 G2A Y 6 G2B Y 5 138 Y 4 Y3 C Y2 B Y1 A Y0

\Y 15 \Y 14 \Y 13 \Y 12 \Y 11 \Y 10 \Y 9 \Y 8

S2 S1 S0

G1 Y 7 G2A Y 6 G2B Y 5 138 Y 4 Y3 Y2 C Y1 B Y0 A

\Y 7 \Y 6 \Y 5 \Y 4 \Y 3 \Y 2 \Y 1 \Y 0

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