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Unit - IV Lect2-Modes of Transfer: Program: B.Tech (IT) Course: Computer Architecture and Organization

This document discusses three modes of data transfer between a CPU/memory and peripherals: 1. Program-controlled I/O, where the CPU continuously polls I/O devices to check for data readiness. This involves constant CPU involvement but is simple with little hardware. 2. Interrupt-initiated I/O, where an I/O interface monitors devices and generates interrupts to notify the CPU only when data is ready, reducing CPU time spent polling. 3. Direct memory access (DMA), which allows high-speed transfer of large data blocks directly between devices and memory via a DMA controller, freeing the CPU to perform other tasks during the transfer.

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Nitesh Jalan
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36 views5 pages

Unit - IV Lect2-Modes of Transfer: Program: B.Tech (IT) Course: Computer Architecture and Organization

This document discusses three modes of data transfer between a CPU/memory and peripherals: 1. Program-controlled I/O, where the CPU continuously polls I/O devices to check for data readiness. This involves constant CPU involvement but is simple with little hardware. 2. Interrupt-initiated I/O, where an I/O interface monitors devices and generates interrupts to notify the CPU only when data is ready, reducing CPU time spent polling. 3. Direct memory access (DMA), which allows high-speed transfer of large data blocks directly between devices and memory via a DMA controller, freeing the CPU to perform other tasks during the transfer.

Uploaded by

Nitesh Jalan
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Program: B.

Tech (IT)
Course: Computer Architecture and Organization

Unit –IV
Lect2- Modes of Transfer
MODES OF TRANSFER - PROGRAM-
CONTROLLED I/O -
3 different Data Transfer Modes between the central
computer(CPU or Memory) and peripherals; Program-Controlled I/O
Interrupt-Initiated I/O
Direct Memory Access (DMA)
Program-Controlled I/O(Input Dev to CPU)
Data bus Interface I/O bus
Address bus Data register
Data valid I/O
CPU I/O read device
I/O write Status Data accepted
register F

Read status register


Check flag bit

=0 Polling or Status Checking


flag
=1 • Continuous CPU involvement
Read data register
• CPU slowed down to I/O speed
Transfer data to memory • Simple
• Least hardware
no Operation
complete?
yes
Continue with
program
MODES OF TRANSFER - INTERRUPT INITIATED I/O &
DMA
Interrupt Initiated I/O
- Polling takes valuable CPU time
- Open communication only when some data has
to be passed -> Interrupt.
- I/O interface, instead of the CPU, monitors the I/O device
- When the interface determines that the I/O device is
ready for data transfer, it generates an Interrupt Request to the CPU
- Upon detecting an interrupt, CPU stops momentarily
the task it is doing, branches to the service routine
to process the data transfer, and then returns to the
task it was performing

-
DMA (Direct Memory Access)

Large blocks of data transferred at a high speed to


or from high speed devices, magnetic drums, disks, tapes,
etc.
- DMA controller
Interface that provides I/O transfer of data directly
to and from the memory and the I/O device
- CPU initializes the DMA controller by sending a
memory address and the number of words to be transferred
- Actual transfer of data is done directly between
the device and memory through DMA controller
-> Freeing CPU for other tasks
References
• Morris Mano, “Computer System
Architecture”, Pearson Education, 3rd
edition.

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