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Boolean Instructions

The 8051 microcontroller contains a Boolean processor for single-bit operations using direct addressing. The carry bit is used as a single-bit accumulator. Boolean instructions referencing the carry bit are assembled as carry-specific instructions. The carry bit also has a mnemonic representation "CY" that can be used with non-carry-specific instructions. An example program uses Boolean instructions to compute the logical AND of two port bits and output the result to another port bit in a loop, with a worst-case delay of 11 CPU cycles.

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Rohan Vaidya
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525 views

Boolean Instructions

The 8051 microcontroller contains a Boolean processor for single-bit operations using direct addressing. The carry bit is used as a single-bit accumulator. Boolean instructions referencing the carry bit are assembled as carry-specific instructions. The carry bit also has a mnemonic representation "CY" that can be used with non-carry-specific instructions. An example program uses Boolean instructions to compute the logical AND of two port bits and output the result to another port bit in a loop, with a worst-case delay of 11 CPU cycles.

Uploaded by

Rohan Vaidya
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Boolean Instructions

• 8051 contains a complete Boolean processor for single-bit

operations.

• All bit accesses use direct addressing

• Bits may be set or cleared in a single instruction

• Example: SETB P1.7 CLR P1.7

• Carry bit in PSW is used as a single-bit accumulator for Boolean

operations.

• Bit instructions that refer to carry bit as C are assembled as carryspecific


instructions

• Carry also has a mnemonic representation (CY) which can be used

in connection with non-carry-specific instructions.

• Example:

CLR C

CLR CY

Both do the same. First one is 1 byte and the second one is 2-bytes

Boolean Instructions

• Example: Compute the logical AND of the input signals on

bits 0 and 1 of Port 1 and output the result to bit 2 of Port 1.

LOOP: MOV C, P1.0 (1 cycle)

ANL C,P1.1 (2 cycle)

MOV P1.2,C (2 cycle)

SJMP LOOP (2 cycle)

– Worst case delay is when one of the inputs changes right

after the first instruction. The delay will be 11 CPU cycles

(for a 12 MHZ clock, this is 11 us)


There are three versions of JMP instruction: SJMP, LJMP and

AJMP.

• SJMP instruction specifies destination address as a relative

offset. This instruction is 2 bytes and jump distance is limited

to -128 to 127.

• LJMP specifies the destination address as a 16-bit constant.

The destination address can be anywhere in the 64K program

memory space

• AJMP specifies the destination address as an 11-bit constant.

Destination must be within a 2K block of AJMP.

• In all cases, programmer specifies the destination address to

the assembler (using label or a 16-bit constant) and the

assembler puts destination address into correct format.

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