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Ca HW3

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34 views4 pages

Ca HW3

Uploaded by

sbachala
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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5.

1 a:

The 2 way cache access time (ns): 1.22184640996

The 4 way cache access time (ns): 1.44656947722

Direct Mapped cache access time (ns): 0.936798833296

Relative Access of 2 way access time (ns) with Direct Mapped access time (ns):

1.22184640996/ 0.936798833296  1.3042783215913054161639562981986 30.4%

Relative Access of 2 way access time (ns) with Direct Mapped access time (ns):

1.44656947722 / 0.936798833296  1.3042783215913054161639562981986


1.5441623385998901514157122302702 54.4%

5.1 b

The 4 way cache access time (ns) for 64KB: 1.44656947722

The 4 way Access time (ns) for 32KB: 1.37647563082

The 4 way Access time (ns) for 16KB: 1.37005724557

Relative The 4 way cache access time (ns) for 64KB with the 4 way Access time (ns) for 16KB:

Access time of 64KB /Access timeof16 KB = 1.0558460107396226161910593077234 =5.58%

Relative The 4 way cache access time (ns) for 32KB with the 4 way Access time (ns) for 16KB:

Access time of 32KB /Access timeof16 KB = 1.0046847569842453470029861067654 = 0.468%

5.1C

16 KB Direct Mapped Access time (ns) = 0.621959960595

32 KB Direct Mapped Access time (ns) = 0.73501102768

All the other caches have greater than 0.75ns.


16KB 2 way, 16KB 4 way, 32KB 2way, 32KB 4way, 4KB Direct Mapped, 4KB 2 Way , 4KB 4 way are >.75

AMAT 16KB= (1-0.0159470) + 0.015970 X 20 =1.302993

AMAT 16KB= (1 – 0.0110603) + 0. 0110603X 20 =1.2101457 cycle

Ans= 32 KB as it is lowest miss rate

5.2 a:

The 2 way cache access time (ns) for 64 KB = 0.00367 X 20+ (1- 0.0036625) = 1.06958

AMAT of way predicted = 0. 00367 X 20 + (0.8 X 1 + (1-0.8) X 2) X (1-0. 00367) = 1.268855 cycles.

5.2 b:

Average access (ns) time for 64 KB 2 ways: 1.22184640996

Average access (ns) time for 32 KB direct Mapped: 0.73501102768

Relative Access time of 64 KB 2 ways with 32 KB direct Mapped

 1.22184640996 / 0.73501102768

1.6623511266445275165670695287873 66%(64 KB 2 ways is 66% slower than 32 KB direct


Mapped).

5.2 C:

Without Way:

AMAT of way predicted = 0. 0036625 X 20 + (0.8 X 1 + (1-0.8) X 2) X (1-0. 0036625) = 1.269 cycles.
With Way:

AMAT of way predicted = 0. 0036625 X 20 + (0.8 X 1 + (1-0.8) X 15) X (1-0. 0036625) = 3.859 cycles.

Since With Way >Without Way, the effect is -ve

Relative Value= With Way/ Without Way = 3.859/1.269 = 3.04.

5.2 d

Serial access Time (ns) = 2.68574080697

Serial total read dynamic energy per read port(nJ): 1.17150465044

Parallel access Time (ns) = 2.08004365614

Parallel total read dynamic energy per read port(nJ): 1.07068416501

Relative Access Time = Serial access Time (ns)/ Parallel access Time (ns)

2.68574080697/ 2.08004365614  1.29119442

Relative Energy = Serial access Time (ns)/ Parallel access Time (ns)

1.17150465044/ 1.07068416501 1.094164543

5.4:

Critical Word First: The miss service would require 120 cycles

Without Critical Word:


120 + ((120-16)/16)*16= 120+112=232 cycles.

5.6 A:

Let the block size= M  Matrix=M X M

 We have two Matrices ( In and out).


 The total block size = 64 KB= 216 Bytes
 Therefore M X M X 2 X8= 216
 M2 =212
 M=64 is the block size.

5.6 B: The minimal set associatively should be two.

5. 6 C:

Blocked computing would be fast when we are doing GPU computing (Using tiles in CUDA). But, in this
scenario it would be the same.

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