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Dynamic Macro Model

A dynamic macro model is used to minimize skew between a reference clock pin and target pins during clock tree synthesis. It specifies a reference pin along a clock path and a target leaf pin. This balances skew between the pins by matching their arrival delays. For example, it can balance the skew between two flop clock pins when one has a through pin defining its clock path. The model overrides any previous target pins and can specify an offset to the target pin's arrival delay.

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Rajashree Srinidhi
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308 views

Dynamic Macro Model

A dynamic macro model is used to minimize skew between a reference clock pin and target pins during clock tree synthesis. It specifies a reference pin along a clock path and a target leaf pin. This balances skew between the pins by matching their arrival delays. For example, it can balance the skew between two flop clock pins when one has a through pin defining its clock path. The model overrides any previous target pins and can specify an offset to the target pin's arrival delay.

Uploaded by

Rajashree Srinidhi
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Dynamic Macro Model

A dynamic macro model is used to minimize the skew between the reference pin and the target pin during
CTS. The reference pin is a clock instance pin along a clock path. The target pin must be a leaf pin.
DynamicMacroModel ref refInstPinName pin targetInstPinName [offset
delayNumber]
where refInstPinName is the reference instance pin name, targetInstPinName is the target instance
pin name, and delayNumber specifies the offset arrival delay in nanoseconds or picoseconds.
As an example, the DynamicMacroModel statement can be used when your design contains clock
dividers. The following figure contains two flops, A and B.

A ThroughPin has been defined in the clock pin of Flop B. So, the clock pin of Flop A is balanced with
the group of flops and not with the clock pin of Flop B because of the ThroughPin that has been
defined in Flop B. Using a dynamic macro model in Flop A, you can balance the skew between the two
flops. You can then specify clock pin of Flop B as a reference pin and clock pin of Flop A as the target pin
so that the clock pin of flop A is balanced with the clock pin of flop B. The DynamicMacroModel
statement minimizes the skew between these two flops to avoid timing violation on the data path.
The following figure illustrates how the skew is minimized between the reference pin and the target pin
using dynamic macro model. If there are multiple DynamicMacroModel statements where the target pin
is referenced to more than one reference pin, the latter overrides the previous statement. The offset
parameter is optional. Instead of minimizing the difference between the arrival
delays at the reference and the target pins, the offset parameter allows you to specify the offset arrival
delay for the target pin. The offset arrival delay can be a positive or a negative value. A positive offset
number indicates a shorter clock path for the target pin as compared to that of a reference pin. The
default value of the offset parameter is 0.
Example
In the following example, a clock tree is built by minimizing the skew between the reference
pin (Clock_gate/CGC1/CLK) and the target pins (fsm_reg1/CLK, fsm_reg2/CLK, and so on)...
DynamicMacroModel ref Clock_gate/CGC1/A pin fsm_reg1/CLK offset 1
DynamicMacroModel ref Clock_gate/CGC1/A pin fsm_reg2/CLK offset 1

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