Real Time Processing
Real Time Processing
Abstract - In the School of Information Technology and The work presented here was carried out mostly by un-
Engineering a microcomputer incorporating a real-time dergraduate students in their final projects. The laboratory
operating system has been designed to be used in various staff were involved in the specification, design and supervi-
laboratory projects. The hardware is composed mainly of sion. The system is therefore a reflection of the capabilities
standard components like MC68332 processor and memory of our students.
modules. The memory controller and a multiport unit have
been designed using VHDL and are realised with EPLDs. Requirements and Methodology For the
The background debug mode facility of the processor en- Microcomputer Platform
abled the fast and successful development from scratch. The
real-time operating system was designed to be lean, yet An investigation of planned applications in conjunction with
including sufficient features to solve real world problems. It several industrial partners revealed the following require-
was developed incrementally using object oriented methods. ments for the microcomputer platform. A CPU of moderate
The requirements, development methodology and experience speed and 32 bit architecture should be used. The memory
gained during its development in several undergraduate demands of modern object-oriented software is steadily
research projects are described in detail including the increasing and more than 1 MByte is mandatory. For mem-
specification process, creation of user manuals, testing pro- ory sizes of this order, standard dynamic RAM (DRAM) is
cedures and benchmarks. recommended. The DRAM has to be interfaced with a
DRAM controller. To interface with the user and with the
Introduction technical process, several serial and parallel ports are
needed.
Embedded systems are of great importance for many prod- The development of the microcomputer platform is
ucts in industry. They are vital for automotive systems, greatly simplified if a microprocessor with a background
communication equipment and safety systems. [1], [2], [3]. debug mode (BDM) facility is used. The BDM offers facili-
Embedded systems are taught in the second and third ties similar to an emulator: run/halt/single step of the CPU,
year undergraduate courses. Lectures on ″Micro- register reading and setting, memory reading and setting.
Computing″, ″Software Engineering″ and ″Real-Time Sys- One advantage of the BDM interface over an emulator is its
tems″ form a good base for engineering education in this much lower price.
field. The lectures are supplemented by laboratory projects, Figure 1 shows the environment for the development of
which help the students to acquire an in-depth understanding the microcomputer platform. From various workstations and
of embedded systems [4]. Our experience with these dedi- PCs in the laboratory one can access the microcomputer
cated projects was similar to those reported in [5]. The stu- platform via the local area network and a BDM interface.
dents participated very enthusiastically and gained experi- Due to BDM facilities we could start with the microproces-
ence of areas like project management and software quality sor only. By adding one component after another we devel-
assurance in addition. oped the microcomputer system incrementally. Initially, no
Commercial microcomputers running embedded con- serial interface was available for the platform, and the
troller software applications are often not suitable for labo- download of the software and the debugging was performed
ratory projects. Projects focusing on the construction of via BDM.
embedded systems from components can seldom be realised The software has been designed mostly on a HP-
using standard platforms alone. Commercial systems require workstation with a C/C++ cross compiler. Some parts of the
intensive training and often contain many unknown technical software like the user interface, data structures and algo-
details. A highly flexible platform is required to support rithms were tested with a simulator on the workstation. For
different application areas. Therefore we decided to design a tests involving real-time aspects and those related to the
microcomputer platform tailored to our needs and flexible technical process the software is downloaded via the local
enough for future extensions. area network and the BDM to the platform.
Microcomputer totypes fulfilling the users needs which are ready for testing
Platform with and benchmarking.
Real-Time
Development Background Operating System development phase
Workstations Debug BMD- Interfaces
Interface Port Technical release
Process testing
1 2 3 4
cluster #n
1 user manuals
local area network 1 2 3 4 2 design
cluster #1
3 implementation & testing
Figure 1. Environment of the Microcomputer Platform require- 4 validation & generalisation
ments
As far as possible, hardware/software codesign methods
are used to enable parallel development of hardware and Figure 2. Extended cluster model
software. The application specific part of the hardware is
implemented by means of the programming language VHDL Object-oriented structured design (OOSD) is used for the
in Programmable Logic Devices (PLD). The use of VHDL design of cluster’s classes [7]. It helps to identify the element
fits in very well with the way students of Information Tech- functions and hidden data elements of the classes and to
nology are used in thinking. In a first step the hardware is specify the parameters graphically. It is used to describe the
constructed with wire wrapping, allowing easily modifica- inheritance and association between classes as well.
tions. Reaching a certain maturity level, the circuit is built up User manuals are developed in a structured manner fol-
as a printed circuit board, showing good and reliable per- lowing the UNIX documentation style. They are developed
formance also in the case of operation with maximum speed. at the beginning of the project, clusterwise, in close co-
operation with the customer. After the review of the manuals
Requirements and Methodology the design and implementation is performed straight away.
For the Software Development The learning curve of the described methods proved to be
very steep. After a short period of time the students as proj-
ect engineers use them very effectively to construct high
During the planning stage the following requirements re- quality software. At the same time project management is
garding the construction of the real-time operating system greatly improved and simplified.
were considered important:
− hardware-independence,
− minimal set of operating system functions to solve real Hardware of the Microcomputer Platform
world problems,
− design of the kernel and the operating functions by means Figure 3 shows the block diagram of the microcomputer
of object-oriented methods, platform. The hardware is mainly composed of standard
− incremental development and project management, components. The microprocessor MC68332 is used, which is
− provision of user manuals in standard form, dedicated for embedded applications. It consists of a CPU
− high reliability of the software. with moderate power (10 MIPS) and 32 bit architecture, a
The deployed methodology consists of several practical BDM interface, an on-chip SRAM of 2 kByte, a serial port,
techniques which complement each other. They are easy to several parallel IO-ports, a chip select logic and several
learn and provide useful provisional results during the devel- timers [8].
opmental stages. Only a small EPROM is needed for the start up software
The software cluster development model is used [6]. The as the real-time operating system and the application soft-
whole system has to be divided into coherent clusters, which ware are downloaded from a server into the DRAM module
are developed according to the traditional model for software of 8 MBytes. Additionally a SRAM is implemented. The
development consisting of the phases specification, design, user can control the system via a terminal attached to the
implementation & testing, validation & generalisation. Each serial port. The access to the technical process is through two
new cluster represents a part of the operating system, which parallel ports.
works with already completed clusters. We extended it by The DRAM controller, the reset logic and the parallel IO
two additional phases: requirements specification, release port have been designed in VHDL and are implemented with
testing and validation of the whole system. Figure 2 shows an erasable programmable logic device (EPLD) as depicted
the phases of the extended cluster model. The benefit of in figure 4. In VHDL concurrent actions can be described by
adopting this model is early availability of high quality pro- parallel processes. The reset process resets the processor and
sets the configuration parameters, e. g. bus width as soon as the data bus and the address bus are supplied with a connec-
the reset button is pressed or when the supply voltage is tor. The board can be used in a plug-in system together with
below a certain level. The parallel port unit can be config- additional modules such as an Ethernet card, an analog-
digital-converter card or an ISDN card.
Data Bus
Adress Bus
Design of the Real-Time Operating System
SRAM DRAM Parallel
Microprocessor
2*32kByte Controller Port IO
Hardware-independence of the real-time operating system
MC68332
can be achieved by the construction of a hardware wrapper.
It consists of classes whose member functions wrap the timer
BDM Interface
needed to realise the real-time clock and other hardware
DRAM
components [9]. All other software components of the real-
Serial Reset EPROM Parallel
Interface Logic 32KByte
Module
Interface
time operating system MEBS (Mini-Echtzeit-Betriebs-
8 MByte
System) developed at our School use this high level hard-
Serial
Port
2*Parallel ware abstraction through well defined and constructed inter-
Port
faces.
Figure 3. Block diagram of the microcomputer pla tform
Task
class
ured via the data bus and each pin can be programmed sepa- Task
declare
rately as input or output.
The DRAM controller has to interface the DRAM mod- activate
ule to the data bus and the address bus for normal read and
write operations and has to trigger the refresh at given time task control
intervals. The time interval is easily produced by a counter block
~Task
which works with the processor clock. The correct timing of
Configuration Port A
of Processor Name: Task
Port B Synopsis: ... User Manual Outline
Reset
Processor
Description: ...
Class Hierarchy: none
Process Reset Process Constructors: Task(uint prio=MINPRIO,
Parallel Port uint stackSize=DEF_STACK);
Public methods: declare, delete, ...
Power Reset Adress Data Destructor: ∼Task();
Low Button Bus Bus Protected methods: none
Protected data: none
Pure virtual methods: none
Process Adress
Refresh counter Bus
Figure 5. Specification of the class Task
Clock Refresh
Cycle
At the very beginning of the project the whole system
was partitioned into 3 subsystems consisting of clusters and
Process Process
DRAM State Machine Adress Multiplexer constructed according to the outlined development method-
ology. The subsystems were defined in the planning phase in
RAS/CAS Multiplexed such a way, that a subsystem under development uses and
MUX Adress
relies on services of already developed subsystems. At each
stage of the project an applicable operating system with
reduced functionality was available for quality assurance and
Figure 4. Architecture of the EPLD
testing in real applications. The subsystems contain the fol-
RAS/CAS and MUX is achieved in a clock driven state ma- lowing clusters:
chine. − time management, task management, dispatcher;
The platform is realised on a two layer printed circuit − interrupt management, device management, semaphores;
board of Euro format (100mm by 160mm). The control bus, − queues, software timer, dynamic priorities.
The kernel provides preemptive priority-driven schedul- year under similar conditions as in the industry. Besides
ing of tasks. Equal priority tasks are scheduled in fixed time learning new technology they have to present the result of
slices set by the real-time clock. Figure 5 shows the outline their work as tutors to other students and technical staff.
of the user manual and the OOSD class diagram for the class
Task, which is part of the task management cluster. For
AD Converter
example the method activate is capable of scheduling Parallel
the tasks in absolute time, at given intervals and at a speci- Heating Interface Port
fied interrupt. Data Bus
Benchmarks from independent sources for commercially Adress Bus
Sensor Interface
available real-time operating systems are found in [10]. The Control Bus
authors have used the MC68030/25MHz processor for the
benchmarks, while MEBS was benchmarked with the
MC68000/12MHz processor which is 3 to 4 times slower.
Table 1 compares MEBS with leading operating systems,
like pSOS+, VRTX.
Window- Window-
Sensor Sensor
Table 1. Comparison of benchmark results
Room Room
Benchmark MEBS Comm. Systems 3 4
MC68000/12MHz MC 68030/25Mhz Temperature Temperature
Measurement. Measurement.
Interrupt Response 522 µs 50-343 µs
Suspend/resume Task 619 µs 90-182 µs Window- Window-
Semaphore Get/release 210 µs 8-64 µs Sensor Sensor
Room Room
Queue ping 796 µs 230-900 µs
1 2
Temperature Temperature
Applications Measurement. Measurement.