Scribd
Upload
45 views7 pages

Digital Technology - Lecture 7

The document summarizes key points from a lecture on digital technology. It discusses VHDL coding practices and state machines. It provides an example of a state machine implementation in VHDL. It also covers pulse width modulation (PWM) which is used for applications like light dimming. It describes how PWM works and that its resolution is determined by the number of bits used in the counter. It assigns students to implement an 8-bit PWM for a LED light dimmer in VHDL.

Uploaded by

Jan Kisak Rasmussen
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
45 views7 pages

Digital Technology - Lecture 7

The document summarizes key points from a lecture on digital technology. It discusses VHDL coding practices and state machines. It provides an example of a state machine implementation in VHDL. It also covers pulse width modulation (PWM) which is used for applications like light dimming. It describes how PWM works and that its resolution is determined by the number of bits used in the counter. It assigns students to implement an 8-bit PWM for a LED light dimmer in VHDL.

Uploaded by

Jan Kisak Rasmussen
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 7

Digital technology – Lecture 7

State Machines etc.


15.12.2010
DIGITAL TECHNOLOGY
Lecture 7

Program

• VHDL – coding practice & tips


• State machine example
• PWM (Pulse Width Modulation)
• Assignments / Problems / Exercises

2
DIGITAL TECHNOLOGY
Lecture 7

Tips & Tricks

• most VHDL users now prefer to use the function "rising_edge(clk)" and "falling_edge(clk)"
over the clk'event style. There is also “WAIT UNTIL clock=’1’”;
• case statements can't be used outside of processes

3
DIGITAL TECHNOLOGY Lecture 7

Process – State Machine


BEGIN
- process to update state on leading clock edge
PROCESS
WAIT UNTIL clock=’1’;
current_state <= next_state;
END PROCESS;
- process to determine next state and output
PROCESS (current_state, x)
- whenever one of These signals changes value
BEGIN
CASE current_state IS
WHEN s0 =>
IF x=’0’ THEN
next_state <= s0; z<=0;
ELSE
ENTITY seq1 IS next_state <= s2; z<=’1’;
PORT (x,clock:IN BIT;z:OUT BIT); END IF;
END seq1; WHEN s1 =>
ARCHITECTURE seq1_behaviour OF seq1 IS IF x=’0’ THEN
- represent states using enumerated type next_state <= s1; z<=0;
TYPE state IS (s0,s1,s2); ELSE
-define signals to represent states next_state <= s2; z<=’0’;
-also define initial value for present_state END IF;
SIGNAL present_state:state:=s0; WHEN s2 =>
SIGNAL next_state:state; IF x=’0’ THEN
next_state <= s1; z<=0;
ELSE
next_state <= s0; z<=’0’;
END IF;
END CASE;
END PROCESS;
END seq1_behaviour;

4
DIGITAL TECHNOLOGY Lecture 7

PWM
• PWM is the most used regulation form in digital electronics. It
is actually a Digital to Analog converter in most cases.
• Light dimming, LED Taillights on cars (brake/normal).
• Power supplies (switchmode)
• Class D amplifiers (ICEPower)
• DC Motor control

Period (T) Duty Cycle = PW/T

Pulse Width (PW)

5
DIGITAL TECHNOLOGY Lecture 7

PWM
• Resolution in bits of the PWM (D/A-converter) is equal to the
number of bits used in the (T) counter.
• High resolution requires high clock frequency.

Period (T) Duty Cycle = PW/T

Pulse Width (PW)

6
DIGITAL TECHNOLOGY Lecture 7

Asignment
• Implement a PWM for adjusting the light output of a LED.
(light-dimmer).
• Min. Resolution 256 steps (8bit).
• Hand in VHDL and .UCF file before 31/12-2010

Period (T) Duty Cycle = PW/T

Pulse Width (PW)

You might also like