Electronic engineer interview questions

 What is D-FF?
 What is the basic difference between Latches and Flip flops?
 What is a multiplexer?
 How can you convert an SR Flip-flop to a JK Flip-flop?
 How can you convert an JK Flip-flop to a D Flip-flop?
 What is Race-around problem? How can you rectify it?
 Which semiconductor device is used as a voltage regulator and why?
 Explain an ideal voltage source?
 Explain zener breakdown and avalanche breakdown?
 What are the different types of filters?
 What is the need of filtering ideal response of filters and actual response of filters?
 What is sampling theorem?
 What is impulse response?
 Explain the advantages and disadvantages of FIR filters compared to IIR counterparts.
 What is CMRR?
 Explain half-duplex and full-duplex communication?
 Which range of signals is used for terrestrial transmission?
 Why is there need for modulation?
 Which type of modulation is used in TV transmission?
 Why we use vestigial side band (VSB-C3F) transmission for picture?
 When transmitting digital signals is it necessary to transmit some harmonics in addition to fundamental
frequency?
 For asynchronous transmission, is it necessary to supply some synchronizing pulses additionally or to
supply or to supply start and stop bit?
 BPFSK is more efficient than BFSK in presence of noise. Why?
 What is meant by pre-emphasis and de-emphasis?
 Explain 3 dB cutoff frequency? Why is it 3 dB, not 1 dB?
 Explain ASCII, EBCDIC?

 Insights of an inverter. Explain the working?

 Insights of a 2 input NOR gate. Explain the working?
 Insights of a 2 input NAND gate. Explain the working?
 Implement F= not (AB+CD) using CMOS gates?
 Insights of a pass gate. Explain the working?
 Why do we need both PMOS and NMOS transistors to implement a pass gate?
 What does the above code synthesize to?
 Cross section of a PMOS transistor?
 Cross section of an NMOS transistor?
 What is a D-latch? Write the VHDL Code for it?
 Differences between D-Latch and D flip-flop?
 Implement D flip-flop with a couple of latches? Write a VHDL Code for a D flip-flop?
 What is latchup? Explain the methods used to prevent it?
 What is charge sharing?
 While using logic design, explain the various steps that r followed to obtain the desirable design in a well
defined manner?
 Why is OOPS called OOPS? (C++)
 What is a linked list? Explain the 2 fields in a linked list?
 Implement a 2 I/P and gate using Tran gates?
 Insights of a 4bit adder/Sub Circuit?
 For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?
 Explain various adders and diff between them?
 Explain the working of 4-bit Up/down Counter?
 A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4 clock ticks, A = 1. If X = LOW for 4 clock
ticks, B = 1. Draw a state diagram for this Spec?
 Advantages and disadvantages of Mealy and Moore?
 Id vs. Vds Characteristics of NMOS and PMOS transistors?
 Explain the operation of a 6T-SRAM cell?
 Differences between DRAM and SRAM?
 Implement a function with both ratioed and domino logic and merits and demerits of each logic?
 Given a circuit and asked to tell the output voltages of that circuit?
 How can you construct both PMOS and NMOS on a single substrate?
 What happens when the gate oxide is very thin?
 What is setup time and hold time?
 Write a pseudo code for sorting the numbers in an array?
 What is pipelining and how can we increase throughput using pipelining?
 Explain about stuck at fault models, scan design, BIST and IDDQ testing?
 What is SPICE?
 Differences between IRSIM and SPICE?
 Differences between netlist of HSPICE and Spectre?
 What is FPGA?
 Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and
diffusion layers etc?
 Draw the Layout of an Inverter?
 If the current thru the poly is 20nA and the contact can take a max current of 10nA how would u overcome
the problem?
 Implement F = AB+C using CMOS gates?
 Working of a 2-stage OPAMP?
 6-T XOR gate?
 Differences between blocking and Non-blocking statements in Verilog?
 Differences between Signals and Variables in VHDL? If the same code is written using Signals and
Variables what does it synthesize to?
 Differences between functions and Procedures in VHDL?
 What is component binding?
 What is polymorphism? (C++)
 What is hot electron effect?
 Define threshold voltage?
 Factors affecting Power Consumption on a chip?
 Explain Clock Skew?
 Why do we use a Clock tree?
 Explain the various Capacitances associated with a transistor and which one of them is the most prominent?
 Explain the Various steps in Synthesis?
 Explain ASIC Design Flow?
 Explain Custom Design Flow?
 Why is Extraction performed?
 What is LVS, DRC?
 Who provides the DRC rules?
 What is validation?
 What is Cross Talk?
 Different ways of implementing a comparator?
 What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?
 What is clock feed through?
 Implement an Inverter using a single transistor?
 What is Fowler-Nordheim Tunneling?
 Insights of a Tri-state inverter?
 If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?
 Differences between Array and Booth Multipliers?
 Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?
 Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?
 Insights of a Tri-State Inverter?
 Basic Stuff related to Perl?
 Have you studied buses? What types?
 Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the
latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
 How many bit combinations are there in a byte?
 For a single computer processor computer system, what is the purpose of a processor cache and describe
its operation?
 Explain the operation considering a two processor computer system with a cache for each processor.
 What are the main issues associated with multiprocessor caches and how might you solve them?
 Explain the difference between write through and write back cache.
 Are you familiar with the term MESI?
 Are you familiar with the term snooping?
 Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in
heads.
 In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
 You have a driver that drives a long signal & connects to an input device. At the input device there is either
overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
  What are the total number of lines written by you in C/C++? What is the most complicated/valuable program
written in C/C++?
 What compiler was used?
 What is the difference between = and == in C?
 Are you familiar with VHDL and/or Verilog?
 What types of CMOS memories have you designed? What were their size? Speed?
 What work have you done on full chip Clock and Power distribution? What process technology and budgets
were used?
 What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
 Process technology? What package was used and how did you model the package/system? What parasitic
effects were considered?
 What types of high speed CMOS circuits have you designed?
 What transistor level design tools are you proficient with? What types of designs were they used on?
 What products have you designed which have entered high volume production?
 What was your role in the silicon evaluation/product ramp? What tools did you use?
 If not into production, how far did you follow the design and why did not you see it into production?

 Give two ways of converting a two input NAND gate to an inverter.

 How to calculate depth of  FIFO for rate change implementation ? 
 Simplify Boolean Functions F = xyz + x’y + xyz’. 
 How do you differentiate between coding in C/C++ and at RTL (Register Transfer Level) ? Hint: In RTL logic
is divided into sequential and combinational logic blocks. 
 How do you differentiate between wires and registers in Verilog ?
 How do you diff between blocking vs. non-blocking statements in Verilog ?
 Sensitivity lists declaration in always block for sequential and combinational logic?
 How to implement tri-state logic in verilog?
 Differentiate between tasks and functions in Verilog?
 How to implement Half-adder and full-adder in RTL?
 When the latches are inferred in RTL ?
 Setup time and hold time in digital circuits.
 False path in FPGA’s, Critical path, Negative slack, Jitter vs. clock skew .
 Routing delay, Flop to out delay, Flop to flop delay, Pad to flop delay, Board delay.
 Knowledge of Synthesis and layout constraints.
 How will you allocate your time between architecture, coding, and verification? 
 Checkout the company web pages and on search engines about the latest technology
and products.
 Prepare a set of questions to ask the interviewer about the group and or company.

 If inverted output of D flip-flop is connected to its input how the flip-flop behaves?
 Design a circuit to divide input frequency by 2?
 Design a divide by two counter using D-Latch.
 Design a divide-by-3 sequential circuit with 50% duty cycle.
 What are the different types of adder implementation?
 Draw a Transmission Gate-based D-Latch?
 Give the truth table for a Half Adder. Give a gate level implementation of the same.
 Design an OR gate from 2:1 MUX.
 What is the difference between a LATCH and a FLIP-FLOP?
 Design a D Flip-Flop from two latches.
 Design a 2 bit counter using D Flip-Flop.
 What are the two types of delays in any digital system
 Design a Transparent Latch using a 2:1 Mux.
 Design a 4:1 Mux using 2:1 Mux's.
 What is metastable state? How does it occur?
 What is metastablity?
 Design a 3:8 decoder
 Design a FSM to detect sequence "101" in input sequence
 Convert NAND gate into Inverter in two different ways.
 Design a D and T flip flop using 2:1 mux only.
 Design D Latch from SR flip-flop.
 Define Clock Skew, Negative Clock Skew, Positive Clock Skew?
 What is race condition? How it occurs? How to avoid it?
 Design a 4 bit Gray Counter?
 Design 4-bit synchronous counter, asynchronous counter?
 Design a 16 byte asynchronous FIFO?
 What is the difference between a EEPROM and FLASH?
 What is the difference between a NAND-based Flash and NOR-based Flash?
 Which one is good: asynchronous reset or synchronous reset? Why?
 Design a simple circuit based on combinational logic to double the output frequency.
 What is the difference between flip-flop and latch?
 Implement comparator using combinational logic, that compares two 2-bit numbers A and B. The
comparator should have 3 outputs: A > B, A < a =" B.">
 Give two ways of converting a two input NAND gate to an inverter?
 What is the difference between mealy and moore state-machines?
 What is the difference between latch based design and flip-flop based design?
 What is metastability and how to prevent it?
 Design a four-input NAND gate using only two-input NAND gates.
 Why are most interrupts active low?
 How do you detect if two 8-bit signals are same?
 7 bit ring counter's initial state is 0100010. After how many clock cycles will it return to the initial state?
 Design all the basic gates NOT, AND, OR, NAND, NOR, XOR, XNOR using 2:1 Multiplexer.
 How will you implement a full subtractor from a full adder?
 In a 3-bit Johnson's counter what are the unused states?
 What is difference between RAM and FIFO?
 What is an LFSR? List a few of its industry applications.
 Implement the following circuits:
(a) 3 input NAND gate using minimum number of 2 input NAND gates
(b) 3 input NOR gate using minimum number of 2 input NOR gates
(c) 3 input XNOR gate using minimum number of 2 input XNOR gates assuming 3 inputs A,B,C?
 Design a D-latch using (a) using 2:1 Mux (b) from S-R Latch?
 How to implement a Master Slave flip flop using a 2 to 1 mux?
 How many 2 input xor's are needed to inplement 16 input parity generator?
 Convert xor gate to buffer and inverter.
 Difference between onehot and binary encoding?
 What are different ways to synchronize between two clock domains?
 How to calculate maximum operating frequency?
 How to find out longest path?
 How to achieve 180 degree exact phase shift?
 What is significance of ras and cas in SDRAM?
 Tell some of applications of buffer?
 Implement an AND gate using mux?
 What will happen if contents of register are shifter left, right?
 What is the basic difference between analog and digital design?
 What advantages do synchronous counters have over asynchronous counters?
 What types of flip-flops can be used to implement the memory elements of a counter?
 What are the advantages of using a microprocessor to implement a counter rather than the conventional
method (flip-flop and logic gates)?
 What is the principal advantage of Gray Code over straight (conventional) binary?
 What does Pipelining do?
 Design divide by 2, divide by 3 circuit with equal duty cycle.
 How many 4:1 mux do you need to design a 8:1 mux?
 What is D-Word, Q-word?
 Define Moore, Mealy state machines. Which one is good for timing?
 Design a FSM to detect 10110. What is the minimum number of flops required?
 Design a simple circuit based on combinational logic to double the output frequency.
 Design a 2bit up/down counter with clear using gates. (No verilog or vhdl)
 Design a finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1.
 Minimize: S= A' + AB
 What is the function of a D-flipflop, whose inverted outputs are connected to its input?
 How to synchronize control signals and data between two different clock domains?
 Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in
heads.
 In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
 How many bit combinations are there in a byte?
 What are the different Adder circuits you studied?
 Give the truth table for a Half Adder. Give a gate level implementation of the same.
 Convert 65(Hex) to Binary
 Convert a number to its two's compliment and back.
 What is the 1's and 2's complement of the decimal number 25.
 If A?B=C and C?A=B then what is the boolean operator ?