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Encoder Using Case Statement

The document contains VHDL code for an encoder, decoder, and their implementations using case and if statements. The encoder takes in a 16-bit input and outputs a 4-bit binary representation. The decoder performs the inverse operation of the encoder. Both the encoder and decoder are implemented using case statements and if statements to perform the logic.

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gowrishankar8
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© Attribution Non-Commercial (BY-NC)
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Download as DOCX, PDF, TXT or read online on Scribd
28 views

Encoder Using Case Statement

The document contains VHDL code for an encoder, decoder, and their implementations using case and if statements. The encoder takes in a 16-bit input and outputs a 4-bit binary representation. The decoder performs the inverse operation of the encoder. Both the encoder and decoder are implemented using case statements and if statements to perform the logic.

Uploaded by

gowrishankar8
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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ENCODER USING CASE STATEMENT

library ieee;
use ieee.std_logic_1164.all;

entity encoder is
port (enable :in std_logic;
encoder_in :in std_logic_vector (15 downto 0);
binary_out :out std_logic_vector (3 downto 0));
end encoder;

architecture arc of encoder is

begin
Process (enable, encoder_in) begin
if (enable = '1') then
case (encoder_in) is
when X"0002" => binary_out <= "0001";
When X"0004" => binary_out <= "0010";
when X"0008" => binary_out <= "0011";
when X"0010" => binary_out <= "0100";
when X"0020" => binary_out <= "0101";
when X"0040" => binary_out <= "0110";
when X"0080" => binary_out <= "0111";
when X"0100" => binary_out <= "1000";
when X"0200" => binary_out <= "1001";
when X"0400" => binary_out <= "1010";
when X"0800" => binary_out <= "1011";
when X"1000" => binary_out <= "1100";
when X"2000" => binary_out <= "1101";
when X"4000" => binary_out <= "1110";
when X"8000" => binary_out <= "1111";
when others => binary_out <= "0000";
end case;
end if;
end process;
end arc;
ENCODER USING IF STATEMENT

library ieee;
use ieee.std_logic_1164.all;

entity encoder1 is
port (enable :in std_logic;
encoder_in :in std_logic_vector (15 downto 0);
binary_out :out std_logic_vector (3 downto 0));
end encoder1;

architecture behavior of encoder1 is

begin
process (enable, encoder_in) begin
binary_out <= "0000";
if (enable = '1') then
if (encoder_in = X"0002") then binary_out <= "0001"; end if;
if (encoder_in = X"0004") then binary_out <= "0010"; end if;
if (encoder_in = X"0008") then binary_out <= "0011"; end if;
if (encoder_in = X"0010") then binary_out <= "0100"; end if;
if (encoder_in = X"0020") then binary_out <= "0101"; end if;
if (encoder_in = X"0040") then binary_out <= "0110"; end if;
if (encoder_in = X"0080") then binary_out <= "0111"; end if;
if (encoder_in = X"0100") then binary_out <= "1000"; end if;
if (encoder_in = X"0200") then binary_out <= "1001"; end if;
if (encoder_in = X"0400") then binary_out <= "1010"; end if;
if (encoder_in = X"0800") then binary_out <= "1011"; end if;
if (encoder_in = X"1000") then binary_out <= "1100"; end if;
if (encoder_in = X"2000") then binary_out <= "1101"; end if;
if (encoder_in = X"4000") then binary_out <= "1110"; end if;
if (encoder_in = X"8000") then binary_out <= "1111"; end if;
end if;
end process;
end architecture;
DECODER USING CASE

library ieee;
use ieee.std_logic_1164.all;

entity decoder_using_case is
port (enable :in std_logic;
binary_in :in std_logic_vector (3 downto 0);
decoder_out :out std_logic_vector (15 downto 0));
end entity;

architecture behavior of decoder_using_case is

begin
process (enable, binary_in) begin
decoder_out <= X"0000";
if (enable = '1') then
case (binary_in) is
when X"0" => decoder_out <= X"0001";
when X"1" => decoder_out <= X"0002";
when X"2" => decoder_out <= X"0004";
when X"3" => decoder_out <= X"0008";
when X"4" => decoder_out <= X"0010";
when X"5" => decoder_out <= X"0020";
when X"6" => decoder_out <= X"0040";
when X"7" => decoder_out <= X"0080";
when X"8" => decoder_out <= X"0100";
when X"9" => decoder_out <= X"0200";
when X"A" => decoder_out <= X"0400";
when X"B" => decoder_out <= X"0800";
when X"C" => decoder_out <= X"1000";
when X"D" => decoder_out <= X"2000";
when X"E" => decoder_out <= X"4000";
when X"F" => decoder_out <= X"8000";
when others => decoder_out <= X"0000";
end case;
end if;
end process;
end architecture;

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