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Tutorial1 Question Jimmy

This document provides a tutorial on MOS device modeling. It contains questions about determining the gate bias voltage required for an n-channel MOSFET to realize a given resistance value. It also contains questions about calculating drain current, determining low frequency model parameters, and calculating output resistances for different current mirror configurations. The final questions are about deriving representations of transconductance and explaining the operation of a MOS transistor in different regions.

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Myo Kyaw
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0% found this document useful (0 votes)
389 views

Tutorial1 Question Jimmy

This document provides a tutorial on MOS device modeling. It contains questions about determining the gate bias voltage required for an n-channel MOSFET to realize a given resistance value. It also contains questions about calculating drain current, determining low frequency model parameters, and calculating output resistances for different current mirror configurations. The final questions are about deriving representations of transconductance and explaining the operation of a MOS transistor in different regions.

Uploaded by

Myo Kyaw
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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Tutorial 1 – MOS Device Model

1. In the design of the MOSFET-C filter from an active-RC filter with R=2.72
kohms, an n-channel transistor in triode region which has μnCox=92μA/V2,
W/L=20 μm/2μm, Vtn=0.8V and VDS near zero is used. To realize the
resistance R, determine the gate bias voltage of the MOSFET required.

[Answers: VGS=1.2V]

2. Draw the 3 operating regions for a CMOS transistor (ID vs VDS) and state
clearly the bias conditions in term of VGS, VTH and VDS

3. Find ID for an n-channel transistor that has μnCox=92μA/V2, W/L=20 μm/2μm,


VGS=1.2V, Vtn=0.8V, λ=95.3 ×10-3 V-1 (assumed constant for VDS)
(a) VDS= Veff
(b) VDS= 0.9V

[Answers: (a) 73.6 μA; (b) 77.1 μA ]

4. Derive the low frequency model parameters for an n-channel transistor that
has μnCox=92μA/V2, W/L=20 μm/2μm, VGS=1.2V, Vtn=0.8V, VDS= Veff ,
λ=95.3 ×10-3 V-1.

[Answers: gm=0.368mA/V, rds= 143kohms]

5. Consider the source degenerated current mirror, where Iin=100μA, each


transistor has W/L=100 μm/1.6μm and Rs=5kΏ. Given that μnCox=92μA/V2,
Vtn=0.8V and rds=8000L(μm)/ID(mA), find rout for the current mirror.

[Answer: 814kΏ]

6. Consider the cascode current mirror, where Iin=100μA, and each transistor has
W/L=100 μm/1.6μm. Given that μnCox=92μA/V2, Vtn=0.8V and
rds=8000L(μm)/ID(mA), find rout for the current mirror.
[Answer: approximately 20MΏ]
7. Derive the 3 representations of the transconductance

8. Explain the operation of the MOS Transistor in the Accumulation, Depletion


and Inversion Stage.

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