Modelsim Quick Tutorial
Modelsim Quick Tutorial
Command Description
vlib work creates a work library for holding your
compiled designs
vcom counter.vhd compiles the HDL source code, use vcom for
or VHDL or vlog for Verilog
vlog counter.v tcounter.v
vsim counter loads and simulates the design unit, use
or counter for VHDL or test_counter for
vsim test_counter Verilog
For more simulation exercises and lessons, consult the ModelSim SE Tutorial.