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CISC

Traditional (CISC) Machines Complex Instruction Set Computers (CISC) ‡ ‡ ‡ ‡ ‡ complicated instruction set different instruction formats and lengths different addressing modes e.gVAX or PDP-11 from DEC e.g. Intel x86 family www.chitkara.edu.in 1 VAX Architecture Virtual Address Extension Memory: All addresses are byte address ‡ word (2bytes) ‡ longword (4bytes) ‡ quadworad (8bytes) ‡ octaword (16bytes) All VAX programs operate in a virtual address space of 232 www.chitkara.edu.in 2 VAX Arc

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233 views

CISC

Traditional (CISC) Machines Complex Instruction Set Computers (CISC) ‡ ‡ ‡ ‡ ‡ complicated instruction set different instruction formats and lengths different addressing modes e.gVAX or PDP-11 from DEC e.g. Intel x86 family www.chitkara.edu.in 1 VAX Architecture Virtual Address Extension Memory: All addresses are byte address ‡ word (2bytes) ‡ longword (4bytes) ‡ quadworad (8bytes) ‡ octaword (16bytes) All VAX programs operate in a virtual address space of 232 www.chitkara.edu.in 2 VAX Arc

Uploaded by

Anik
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Traditional (CISC) Machines

Complex Instruction Set Computers (CISC)

• complicated instruction set


• different instruction formats and lengths
• different addressing modes
• e.gVAX or PDP-11 from DEC
• e.g. Intel x86 family

www.chitkara.edu.in 1
VAX Architecture
Virtual Address Extension

Memory: All addresses are byte address


• word (2bytes)
• longword (4bytes)
• quadworad (8bytes)
• octaword (16bytes)
All VAX programs operate in a virtual address space of 232

bytes

www.chitkara.edu.in 2
VAX Architecture
Registers
16 general purpose registers: R0~R15
• each register is 32-bit long
• R15 (PC): Program Counter
• R14 (SP): Stack Pointer
• R13 (FP): Frame Pointer
• R12 (AP): Argument Pointer
• R6~R11: general
• R0~R5: are used by some instructions
www.chitkara.edu.in 3
VAX Architecture
Data Formats
• Integers: byte, word, longword, quadword, or
octaword
• Negative integers: 2’s complement representation
• Floating-point: 4~16bytes
• packed decimal: (C:positive, D:negative,
F:unsigned)

www.chitkara.edu.in 4
VAX Architecture
Instruction Formats
• variable -length instruction format

Addressing Modes
• register mode
• register deferred mode
• autoincrement and autodecrement modes
• several base relative addressing modes

www.chitkara.edu.in 5
VAX Architecture
Instruction Set
The instruction mnemonics are formed by
• a prefix that specifies the type of operation
• a suffix that specifies the data type of the
operands
• a modifier that gives the number of operands
involved
• e.g. ADDW2, MULL3, CVTWL

www.chitkara.edu.in 6
VAX Architecture
A single instruction
• saves a designated set of registers
• passes a list of arguments to the procedure
• maintains the stack, frame, and argument
pointers
• sets a mask to enable error traps for arithmetic
operations

www.chitkara.edu.in 7
VAX Architecture
Input and Output

• I/O device controllers


• Each controller has a set of control/status and data
registers,
• No special instructions required

www.chitkara.edu.in 8

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