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LUT - (Look Up Table) : Field Programmable Gate Arrays

Field programmable gate arrays (FPGAs) can be summarized as arrays of programmable logic blocks connected by a "sea" of interconnect wires. The logic blocks, called configurable logic blocks (CLBs) by Xilinx, contain look-up tables (LUTs) that can implement any logic function of a certain number of inputs using a stored truth table. Inputs and outputs connect to the FPGA through input/output pads that contain sequential logic and driver circuits.

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61 views

LUT - (Look Up Table) : Field Programmable Gate Arrays

Field programmable gate arrays (FPGAs) can be summarized as arrays of programmable logic blocks connected by a "sea" of interconnect wires. The logic blocks, called configurable logic blocks (CLBs) by Xilinx, contain look-up tables (LUTs) that can implement any logic function of a certain number of inputs using a stored truth table. Inputs and outputs connect to the FPGA through input/output pads that contain sequential logic and driver circuits.

Uploaded by

pawanz
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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CMPE100

Field Programmable Gate Arrays

Field Programmable Gate Arrays


Large number of interconnected programmable logic blocks. Some are connected to I/O
pads as well.
Xilinx calls the Programmable Logic Blocks Configurable Logic Blocks (CLBs)
FPGAs can be summarized in one word
____LUT____

( LOOK UP TABLE)
A typical layout of the FPGA is an array of interconnected programmable logic blocks or
configurable logic blocks. The logic blocks are sitting in a sea of interconnect wires.
Interconnects between wires are programmed by turning on/off transistors at the wire
junctions similar to how programmable array logic (PLD) works (using a floating gate
CMOS transistor). Large numbers of PLB or CLBs can be wired together using this
technique. Input/output from the FPGA is handled via special I/O pads which themselves
also contain sequential logic circuitry.

21 November 2002

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CMPE100

Field Programmable Gate Arrays

FPGA - Configurable Logic Block - XC4000 Series CLB

Logic Function Generators (G, F, H)


F & G- 4- input (16 x 1 SRAM)
A function of 4 variables input can be realized with a truth table. That table
is stored in the F & G Function Generators
H 3 input (8 x 1 SRAM)
A function of 3 variables input, realized by table is stored in the H
Function Generators.
Functions that can be realized using F,G & H together.
nd
q Any function of 4-inputs, plus any 2
function of 4 unrelated inputs,
rd
plus a 3 function of 3 unrelated inputs
q A single function of 5 variables.
nd
q Any function of 4 variable, plus some 2
function of 6 unrelated
variables.
q Some functions up to 9-input variables.

21 November 2002

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CMPE100

Field Programmable Gate Arrays

Input/Output PADS
Shown below is the I/O pad block. D-flops are used to hold outgoing
and incoming data. Most of the remainder of circuit are multiplers to
choose value or its complement. Finally at the output pin itself, there is a
transistor network to supply/sink current for driving devices outside
(fanout related).

21 November 2002

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