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Nec-359: Logic Design Lab: Objective:-To Understand The Digital Logic and Create Various Systems by Using

This document outlines the objectives and experiments for an NEC-359 Logic Design Lab course. The objectives are to understand digital logic and create various systems using logic gates. The experiments include implementing Boolean functions using logic gates, verifying flip-flop state tables, designing counters, multiplexers, decoders and adders using logic gates, and other digital logic circuits like multipliers and registers using latches and gates.

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Suvendra Sahoo
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32 views

Nec-359: Logic Design Lab: Objective:-To Understand The Digital Logic and Create Various Systems by Using

This document outlines the objectives and experiments for an NEC-359 Logic Design Lab course. The objectives are to understand digital logic and create various systems using logic gates. The experiments include implementing Boolean functions using logic gates, verifying flip-flop state tables, designing counters, multiplexers, decoders and adders using logic gates, and other digital logic circuits like multipliers and registers using latches and gates.

Uploaded by

Suvendra Sahoo
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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NEC-359: LOGIC DESIGN LAB

Objective:- To understand the digital logic and create various systems by using
these logics.
1. Introduction to digital electronics lab- nomenclature of digital ICs,
specifications, study of the data sheet, concept of Vcc and ground,
verification of the truth tables of logic gates using TTL ICs.
2. Implementation of the given Boolean function using logic gates in both SOP
and POS forms.
3. Verification of state tables of RS, JK, T and D flip-flops using NAND & NOR
gates
4. Implementation and verification of Decoder/De-multiplexer and Encoder
using logic gates
5. Implementation of 4x1 multiplexer using logic gates.
6. Implementation of 4-bit parallel adder using 7483 IC.
7. Design, and verify the 4-bit synchronous counter.
8. Design, and verify the 4-bit asynchronous counter.
Note: The Instructor may add/delete/modify/tune experiments, wherever he/she
feels in a justified
1. Implementation of all logic gates using NAND and NOR gates.
2. Implementation of half adder , full adder ,half subtractor and full subtractor
using NAND gates.
3. Implementation of two bit multiplier using logic gates.
4. Implementation of two bit Comparator using logic gates.
5. Implementation of four bit shift register using D-latch
6. Implementation of Johnson Counter using D-Latch.
7. Implementation of 4 bit Bidirectional Shift Register using D-Latch.
8. Implementation of 4 bit Parallel shifter using D-Latch.
9. Implementation of 4 bit Serial in serial out Register.
10.Implementation of 4 bit parallel in and Parallel out Shift register using DLatch

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