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This document summarizes a student project on developing an FPGA-based digital clock system. It includes a certificate signed by the project guide and head of department, acknowledging the project was completed under their guidance. An acknowledgements section thanks the ECE department, project mentor, and other faculty for their support. The contents page lists 7 chapters covering the introduction, background, project details, results, current status, conclusion, and references. The project was completed by 4 students in partial fulfillment of their Bachelor of Technology degree.

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Dibyajyoti Sarkar
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© © All Rights Reserved
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71 views

Project Report Format - Doc

This document summarizes a student project on developing an FPGA-based digital clock system. It includes a certificate signed by the project guide and head of department, acknowledging the project was completed under their guidance. An acknowledgements section thanks the ECE department, project mentor, and other faculty for their support. The contents page lists 7 chapters covering the introduction, background, project details, results, current status, conclusion, and references. The project was completed by 4 students in partial fulfillment of their Bachelor of Technology degree.

Uploaded by

Dibyajyoti Sarkar
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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FPGA BASED DIGITAL CLOCK SYSTEM

DIBYAJYOTI

SARKAR

Under the guidance of

Prof. Ankush Chattopadhyay


Submitted in partial fulfillment of the requirement for the Degree of Bachelor of Technology
of Maulana Abul Kalam Azad University of Technology (formerly West Bengal University of
Technology), Kolkata.

Department of Electronics and Communication Engineering


ST. THOMAS COLLEGE OF ENGINEERING AND TECHNOLOGY
May, 2016

Certificate

Department of Electronics and Communication Engineering


St. Thomas College of Engineering and Technology

This is to certify that the project entitled FPGA BASED DIGITAL CLOCK SYSTEM
has been carried out by
DIBYAJYOTI SARKAR
(12200312039)
ASHIK ILAHI SARKAR (12200313063)
DIPJOY SARKAR
(12200313066)
ABDUL HALIM
under my guidance during the year July, 2015 to June, 2016 and accepted for partial
fulfillment of the requirement for the Degree of Bachelor of Technology of Maulana Abul
Kalam Azad University of Technology (formerly West Bengal University of Technology),
Kolkata.

(Project guide)

Countersigned by

(Head of the Department)

Acknowledgement

This group feels greatly indebted to ECE department of ST Thomas college of engineering
and technology for the opportunity given to us to undertake this FPGA based Digital
Clock project .This project includes thoughts and contributions of our mentor respected
Prof. Ankush Chattopadhyay and we wish to express our sincere appreciation and gratitude
to him. We appreciate all his comments and suggestions which were incorporated into this
project. Secondly, we wish to thank our lecturers we had in our educational program
through whom this project has become a reality..For the allotment of machine for this
project purpose ,we are also thankful to respected Prof. Prasun Chowdhury.
We would also like to express our gratitude towards our group members, as without their
help, support and encouragement, this project would never have been completed upto this
portion. We thank you all for your endeavors and efforts towards this project.
Hence this project was successfully done upto this part with each of the above mentioned
persons effort and we are grateful and thankful to each.

Dibyajyoti Sarkar
Ashik Ilahi Sarkar

Dipjoy Sarkar
Abdul Halim

Date:
St. Thomas College of Engineering and Technology
Kolkata - 700023

Contents

Chapter
no

Page
number

Chapter name

1.

Introduction

2-

Background of the
project

103

Project details

29

Results / observations

Status of the project

39-40

Conclusion

40

Reference

41

30-38

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