Lecture 4
Lecture 4
2A
+52
7C
AC
+8A
36
AC
+72
1E
C: 0
V: 1
N: 1
Z: 0
C: 0
V: 0
N: 0
Z: 0
C: 1
V: 1
N: 0
Z: 0
C: 1
V: 0
N: 0
Z: 0
8A
5C
2E
5C
8A
D2
2C
72
BA
C: 0
V: 0
N: 0
Z: 0
C: 0
V: 1
N: 0
Z: 0
C: 1
V: 1
N: 1
Z: 0
C: 1
V: 0
N: 1
Z: 0
$1000
$2000
prog
input
result
data
$07
1
HCS12 Programming Model The registers inside the HCS12 CPU the
programmer needs to know about
b6 20 13
40
7a 20 14
3f
0x2013 6c
0x2014 94
A _________________________
Addressing Modes
Assembler Directives
Addressing Modes for the HCS12
Almost all HCS12 instructions operate on memory
The address of the data an instruction operates on is called the effective address of that
instruction.
Each instruction has information which tells the HCS12 the address of the data in
memory it operates on.
The addressing mode of the instruction tells the HCS12 how to figure out the effective
address for the instruction.
Each HCS12 instructions consists of a one or two byte op code which tells the HCS12
what to do and what addressing mode to use, followed, when necessary by one or more
bytes which tell the HCS12 how to determine the effective address.
All two-byte op codes begin with an $18.
For example, the LDAA instruction has 4 different op codes, one for each of the 4
different addressing modes.
; ($2000) A
Effective Address: $2000
LDX $2001
FE 20 01
; ($2001:$2002) X
Effective Address: $2001
STAB $2003
7B 20 03
; (B) $2003
Effective Address: $2003
; ($0020) A
Effective Address: $0020
STX $21
5E 21
; (X) $0021:$0022
Effective Address: $0021
; (A) + $0A A
Effective Address: PC + 1
ADDA 5,Y
AB 45
; Postdecrement Indexed
; Increment the number at address (X),
; then subtract 2 from X
Effective address: contents of X
INC 4,+X
62 23
; Preincrement Indexed
; Add 4 to X
; then increment the number at address (X)
Effective address: contents of X + 4
Constant Offset
Constant Offset
Postincrement
Preincrement
Postdecrement
Predecrement
ACC Offset
Example
Effective Addr
Offset
Value in X
Registers to use
LDAA n,x
LDAA n,x
LDAA n,X+
LDAA n,+X
LDAA n,XLDAA n,-X
LDAA A,X
LDAA B,X
LDAA D,X
(X)+n
(X)-n
(X)
(X)+n
(X)
(X)-n
(X)+(A)
(X)+(B)
(X)+(D)
0 to FFFF
0 to FFFF
1 to 8
1 to 8
1 to 8
1 to 8
0 to FF
0 to FF
0 to FFFF
(X)
(X)
(X)+n
(X)+n
(X)-n
(X)-n
(X)
X,Y,SP,PC
X,Y,SP,PC
X,Y,SP
X,Y,SP
X,Y,SP
X,Y,SP
X,Y,SP,PC
PC + 2 + 0035 PC
BRA C7
20 C7
PC + 2 + C7 PC
PC + 2 39 PC
Long branch instruction: Two bytes following op code specifies how far to branch
Treat the offset as an unsigned number; add the offset to the address following the
current instruction to get the address of the instruction to branch to
LBEQ 21A
18 27 02 1A
If Z == 1 then PC + 4 + 021A PC
If Z == 0 then PC + 4 PC
When writing assembly language program, you dont have to calculate offset
You indicate what address you want to go to, and the assembler calculates the offset
0x1020
BRA $1030
Example
Op Code
ABA
LDAA #$35
LDAA $35
LDAA $2035
LDAA 3,X
LDAA 3,X+
18 06
86 35
96 35
B6 20 35
A6 03
A6 32
Effective
Address
None
PC+1
0x0035
0x2035
X+3
X (X+3 X)
LDAA 3,+X
A6 22
X+3 (X+3 X)
LDAA 3,X-
A6 3D
X (X-3 X)
LDAA 3,-X
A6 2D
X-3 (X-3 X)
BRA $1050
LBRA $1F00
20 23
18 20 0E CF
PC+2+Offset
PC+4+Offset