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Assignment 1

This document contains 3 questions for an assignment on NMOS and CMOS circuit design. Question 1 involves calculating the output voltage of an NMOS inverter for different input voltages. Question 2 asks for the output of an NMOS 2-input NAND gate when both inputs are high. Question 3 requires designing a basic 1-bit comparator cell that can be expanded into an N-bit comparator. Standard circuit parameters are provided for the first two questions involving NMOS transistors.

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0% found this document useful (0 votes)
108 views2 pages

Assignment 1

This document contains 3 questions for an assignment on NMOS and CMOS circuit design. Question 1 involves calculating the output voltage of an NMOS inverter for different input voltages. Question 2 asks for the output of an NMOS 2-input NAND gate when both inputs are high. Question 3 requires designing a basic 1-bit comparator cell that can be expanded into an N-bit comparator. Standard circuit parameters are provided for the first two questions involving NMOS transistors.

Uploaded by

Ivan Amor
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ELG 4137

Assignment 1
Due date: January 31st, 2015

Question 1.
Consider the following NMOS circuit.
VDD = 5V

L = 40 m
W = 10 m

Vi
L = 10 m
W = 10 m

Vout
L = 10 m
W = 10 m

a) Calculate the output voltage Vout when Vi = 0 V.


b) Calculate the output voltage Vout when Vi = VDD V.

Question 2.
For the standard NMOS 2-input NAND gate, determine the output voltage of the circuit when
both inputs V1 and V2 are tied to VDD = 5V.

VDD
Q3

L= 40 m
W= 5 m

VOUT

V2

Q2

L= 5 m
W= 5 m

V1

Q1

L= 5 m
W= 5 m

Question 3.
An N-bit comparator compares two N-bit numbers A and B and indicates whether the numbers
are equal or which of the numbers is greater. Hence there are two N-bit inputs to the comparator,
A and B, and three one-bit outputs, A < B, A = B, A > B. Design a basic cell of a 1-bit
comparator using static CMOS gates that allows modular expansion of the comparator to N-bits.
Note that N can be a large number.

Typical circuit parameters for Questions 1 and 2:


n
=
500 cm2/V-sec.
=
3.54 x 10-13 F/cm
Tox =
5.0 x 10-6 cm
Threshold voltage of NMOS transistors:
Vth
1.0V
Vdep
-4.0V
Threshold voltage of PMOS transistors:
Vth
-1.0V

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