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Digital Logic Design

This document appears to be exam questions for a Digital Logic Design course. It contains 8 questions related to topics like binary, octal, and hexadecimal conversion, Boolean algebra, logic gate implementation of adders, latches and flip-flops, counters, shift registers, and hazards and races in sequential circuits. The questions would require knowledge of digital logic concepts to answer.

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Shaik Bawajan
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30 views1 page

Digital Logic Design

This document appears to be exam questions for a Digital Logic Design course. It contains 8 questions related to topics like binary, octal, and hexadecimal conversion, Boolean algebra, logic gate implementation of adders, latches and flip-flops, counters, shift registers, and hazards and races in sequential circuits. The questions would require knowledge of digital logic concepts to answer.

Uploaded by

Shaik Bawajan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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www.FirstRanker.

com

www.FirstRanker.com

www.FirstRanke

R09

Code: 9A04306

B.Tech II Year I Semester (R09) Supplementary Examinations, May 2013


DIGITAL LOGIC DESIGN
(Computer Science and Engineering)
Time: 3 hours
Max. Marks: 70
Answer any FIVE questions
All questions carry equal marks
*****
1. (a) Convert the following decimal numbers into binary, octal and hexadecimal.
(i) 255 (ii) 1023 (iii) 65,535 (iv) 4097
(b) Convert the following binary numbers to gray code.
(i) 10101100 (ii) 1110011 (iii) 10010010

r
e

2. (a) Prove using De Morgans theorems that XoR and XNoR are complements to each other.
(b) Prove that if a and b are switching variables then prove that
3. (a) Simplify the following Boolean functions:

k
n

a
R

(b) Simplify the Boolean function

t
s
r

4. (a) Realize a full adder using NAND gates.


(b) Realize an half-adder using 2-input NAND gates.

i
F

5. (a) Realize an SR latch circuit using (i) NoR gates and (ii) NAND gates. Give truth table.
(b) Convert a D flip flop to JK flip flop and to T flip flop.
6. (a) Design a 3-bit synchronous up counter using JK flip flops.
(b) Construct a 2-bit serial input serial out shift register using T Flip-Flops.
7. (a) Implement a full-subtractor using ROM.
(b) Design a BCD to excess -3 code converter using PLA Give the PLA programming table.
8.

With examples discuss about.


(a) Hazards.
(b) Races in sequential circuits.

*****

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