Eee 598 Vlsicircuits Fa10
Eee 598 Vlsicircuits Fa10
Instructor:
Credits: 3 hours
Prerequisites:
EEE 523 Analog Circuits
Or equivalent
Grading:
Homework
Midterm Exams
Final Exam
Project
15%
40%
25%
20%
Course Description:
This course will cover VLSI circuit design topics, focusing on VLSI high-speed I/O (or broadband) circuits. This
course is intended for first or second year graduate students, covering theoretical basis, design, modeling, and
validation techniques for various VLSI high-speed I/O circuits. The objective of this course is to build a practical
knowledge of the high-speed I/O circuits and the applications for various industry high-speed I/O circuit standards,
such as LVDS, USB2.0, 1394, S-ATA, PCI-Express, etc. There will be weekly (bi-weekly) HW and class projects.
CAD tools such as CADENCE, MATLAB will be used during the class.
Proposed Text book:
Class Notes VLSI High-Speed I/O Circuits Theoretical Basis, Circuit Architectures, Behavioral Modeling and
Circuit Implementations by Dr. Hongjiang Song.
Reference:
Selected journal/conference papers on VLSI High-Speed I/O Circuits that support covered topics
Topics:
High-Speed I/O Circuit Fundamental
1. High-speed I/O standards, trends and fundamental design challenges
2. Basic I/O prototype and SFG models, Basic I/O circuit timing equation
3. I/O circuit architectures, Common Clock, Forward Clock, and Embedded Clock Signaling
High-Speed Serial I/O Modeling
1. Jitter analysis, modeling and link jitter budgeting
2. Bit Error Rate (BER) analysis and modeling
3. DRC tracking loop modeling
4. PLL/DLL/PI modeling
5. Signal Integrity and Power Delivery
VLSI High-Speed Serial I/O Circuit designs/implementations
1. Transmitter circuits
2. Receiver circuits
3. Channel, T-line, Automatic Termination and Equalization Circuits
4. PLL/DLL/PI circuits
5. Data recovery circuit
6. Voltage and current references circuits
Validation Techniques of High-Speed I/O Circuits
1. TDR & VNA
2. Jitter & BERT measurement