Scribd
Upload
24 views

Digital Design Lectures

The document discusses combinational logic analysis and design. It describes various logic implementation methods like AND-OR, NAND-NAND etc. It provides an example of designing logic to multiply two 2-bit numbers using a truth table and Karnaugh maps. It also discusses designing logic for a 7-segment display and BCD to 7-segment decoder using NAND gates. The document analyzes combinational logic circuits like decoders and provides an example of a 2-4 decoder implementation using logic gates.

Uploaded by

Gyananshu Upadhyay
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
24 views

Digital Design Lectures

The document discusses combinational logic analysis and design. It describes various logic implementation methods like AND-OR, NAND-NAND etc. It provides an example of designing logic to multiply two 2-bit numbers using a truth table and Karnaugh maps. It also discusses designing logic for a 7-segment display and BCD to 7-segment decoder using NAND gates. The document analyzes combinational logic circuits like decoders and provides an example of a 2-4 decoder implementation using logic gates.

Uploaded by

Gyananshu Upadhyay
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 30

Combinational Logic

Analysis & Design

Combination
IMPLEMENTATION

AND OR
NAND-NAND
NOR-OR
OR-NAND
OR AND
NOR-NOR
NAND-AND
AND-NOR

K-MAP

SOP
SOP
SOP
SOP
POS
POS
SOP
SOP

Invert POS
Invert POS
Invert
Invert

Design Example 2
Multiply

2 two-input variable
Product of 2-bits four bits

Truth Table
A
1

A
0

B
1

B
0

P3 P2 P1 P0

A
1

A
0

B
1

B
0

P3 P2 P1 P0

P3
15
P3

= A1A0B1B0

P2
10,11,14
A1A0B1B0

+
A1A0B1B0+A1A0B1B0
A1A0B1+A1A0B1Bo
A1B1(Ao+A0B0)
A1B1(Ao+Bo)
A1B1A0+A1B1B0

P1

6,7,9,11,13,14 B1B000

01

A1A0

A1A0B1

A0B1B0

A1B1B0

11

10

00

01

11

10

A1A0B0

P0

5,7,13,15

A0B0

B1B0
00
A1A0

01

11

10

00

01

11

10

Logic Circuit
A0
B0

P0
P3
A1
B1

A1
B1
B0
A1
A0
B1

P2

Logic Circuit
A1
A0
B1
A0
B1
B0
A1
B1
B0
A1
A0
B0

P1

Seven Segment Displays


COMMON ANODE

COMMON CATHODE

R
Vcc

Common Anode Display


a
f

h
d

Design Example -3
Design

a logic that will convert a


NBCD value to 7-segment equivalent
a
f

h
d

Truth Table
A
0
0
0
0
0
0
0
0
1

B
0
0
0
0
1
1
1
1
0

C
0
0
1
1
0
0
1
1
0

D
0
1
0
1
0
1
0
1
0

a
0
1
0
0
1
0
1
0
0

b
0
0
0
0
0
1
1
0
0

c
0
0
1
0
0
0
0
0
0

d
0
1
0
0
1
0
0
1
0

e
0
1
0
1
1
1
0
1
0

f
0
1
1
1
0
0
0
1
0

g
1
1
0
0
0
0
0
1
0

SOP equations
= (1,4,6)
b = (5,6)
c = (2)
d = (1,4,7,9)
e = (1,3,4,5,7,9)
f = (1,2,3,7)
g = ( 0,1,7)
a

a
AB

CD 00

00

01

01

11

m1

m1
3

10

11

X
X

a = BD + ABCD

m1
5

m1
1

10

1
X
X

m
6

m14
m1
0

b
AB

CD 00

00

01

11

m1

01

m
m1
3

10

11

b = BCD+BCD

X
X

m1
5

m1
1

10

1
X
X

m
6

m14
m1
0

c
AB

CD 00

01

11

00

01

11

m1

m1
3

10

c = BCD

10

m
2

X
X

m1
5

m1
1

X
X

m14
m1
0

d
AB

CD 00

00

01

11

10

01

m
1

m1
m
8

X
1

11

m1
3

m
9

1
X
X

10

m
7

m1
5

m1
1

X
X

d = BCD + BCD + BCD

m14
m1
0

e
AB

CD 00

00

01

11

10

m
m1
m
8

01

m
m1
3

e = D + BC

m
9

11

1
1
X
X

10

m
7

m1
5

m1
1

X
X

m14
m1
0

f
AB

CD 00

01

00

01

11

m1

m1
3

10

11

1
1
X
X

f = BC + BC+ABD

10

m
2

m
7

m1
5

m1
1

X
X

m14
m1
0

g
AB
00

CD 00

01
11

01

m1

m1
3

10

11

1
X
X

g = ABC+BCD

10

m
7

m1
5

m1
1

X
X

m14
m1
0

7447
1C

VCC 16

2 B

f 15

3 LT

g 14

4 BI/
RBO
5

a 13

7447

RBI
6A

b
12
c 11

7D

d 10

8
GND

e 9

Combinational
Logic
ANALYSIS & DESIGN - MSI

7447
1C

VCC 16

2 B

f 15

3 LT

g 14

4 BI/
RBO
5

a 13

7447

RBI
6A

b
12
c 11

7D

d 10

8
GND

e 9

Decoder
Class of combinational logic that convert one form of
code to another
n i/p
2n o/p

2 4 decoder
Inputs
EN
Select

Output

PT

Y3

Y2

Y1

Y0

(AB
)
(AB)

(AB)

(AB)

2- 4 decoder ckt
G

G1
B

1
0

G2

G3
A

0
1

G4

1
0
1
1

74139
1A
1B
1G

2A
2B
2G

74LS13
9

1
1
1
1

Y0m0' M0
Y1 m1' M1
Y2 m2' M2
Y3 m3' M3

2
2
2
2

Y0
Y1
Y2
Y3

f(A,B) = (0,3)
1
1
1
1

1A
1B
1G -0

2A
2B
2G

74LS13
9

Y0
Y1
Y2
Y3

2
2
2
2

Y0
Y1
Y2
Y3

You might also like