4 Bit Magnitude Comparator-2
4 Bit Magnitude Comparator-2
Design a 4 bit magnitude comparator that compares two 4 bit binary values and output
their relative magnitude.
Magnitude comparator is a combinational circuit that compares to numbers and determines their
relative magnitude. The output of comparator is usually 3 binary variables indicating:
A>B; A=B; A<B
ECE 205L
Prelab :
1. Draw a circuit using basic logic gates to represent a 4 bit magnitude
comparator.
2. Write a generalized truth table for 4 bit comparator where A3 A2 A1
A0, B3 B2 B1 B0 are inputs and A>B, A<B, A=B are outputs.
(Represent High as logic 1, Low as logic 0 and dont care condition
as X)
Lab :
1. Show the simulation for the verilog modules. Use the following test
values:
A3A2A1A0
1110
1011
B3B2B1B0
0101
1011
1111
0000
1010
0111
1011
1000
1100
0000
1001
0000
2. Demonstrate the same on FPGA using switches for inputs and LEDs for
outputs.
ECE 205L