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How Do I Implement My MATLAB Algorithm in An FPGA

There are several options for implementing a MATLAB algorithm in an FPGA: 1. Simulink HDL Coder can generate synthesizable HDL from Simulink models and M-code, but higher performance is achieved using Xilinx tools. 2. Xilinx System Generator for DSP allows designing algorithms in Simulink using optimized Xilinx blocks for higher performance FPGAs. 3. Manually coding HDL based on the MATLAB algorithm is the most manual option but yields an HDL design not dependent on tools.

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22 views

How Do I Implement My MATLAB Algorithm in An FPGA

There are several options for implementing a MATLAB algorithm in an FPGA: 1. Simulink HDL Coder can generate synthesizable HDL from Simulink models and M-code, but higher performance is achieved using Xilinx tools. 2. Xilinx System Generator for DSP allows designing algorithms in Simulink using optimized Xilinx blocks for higher performance FPGAs. 3. Manually coding HDL based on the MATLAB algorithm is the most manual option but yields an HDL design not dependent on tools.

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Anonymous JnvCyu85
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How do I implement my MATLAB algorithm

in an FPGA?
Options
05-24-2010 01:46 PM
This question comes up often, so I thought I'd post the Q & A here:

Starting with an algorithm in MATLAB, you have a couple of options for implementation in a
Xilinx FPGA.

1. Simulink HDL Coder: The MathWorks offers a tool called Simulink HDL Coder which
creates synthesizable HDL from Simulink models and Embedded M-code. This is very useful
for quickly evaluating new algorithms in hardware. However, higher performance is achieved by
using the Xilinx DSP tools (option 2 below).
2. Xilinx System Generator for DSP: Xilinx offers a highly optimized library of blocks that
can be simulated within Simulink and then compiled for FPGA implementation. This tool is
called Xilinx System Generator for DSP. It would require you to transfer your design into the
Simulink enviroment and replace the Simulink simulation-only blocks with System Generator
blocks. This design flow offers higher performance than HDL Coder because each block is preoptimized IP for Xilinx FPGAs.

3. Manually HDL Coding: The final option is the most manual. Based on your MATLAB
algorithm, you would start from the beginning and code up your design in VHDL or Verilog
(possibly instantiating Xilinx IP), create an HDL testbench and compair the input/output vectors
of MATLAB with your HDL simulator. Engineers have done it this way for decades, but it is a
slow and error-prone approach. Like The MathWorks HDL Coder it does have the advantage of
yielding an HDL design that is not dependent upon a specific software tool.

4. Synphony HSL: Synopsys has a High Level Synthesis tool (HSL) called Synphony HLS
that is advertised to take MATLAB code, quantize it and synthesize HDL code. I haven't yet
used this tool so I can't comment on their design flow. It sounds similar to a tool that Xilinx

recently discontinued called AccelDSP, which provided a great way to quickly prototype
MATLAB algorithms and target FPGA hardware. However, it did not usually yield the highest
performance design.

Options #2 and #3 will be your least expensive path in terms of software tool costs and the best
way to achieve the highest possible performance.

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